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https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
ddf49cbf35
Devicetree files in RK3399 platform is synced from Linux, like other platforms does. Apart from these u-boot in rk3399 would also require some u-boot specific node like dmc. dmc node has big chunk of DDR timing parameters which are specific to specific board, and maintained with rk3399-sdram*.dtsi. So, create board specific -u-boot.dtsi files and move these sdram dtsi files accordingly. This would help of maintain u-boot specific changes separately without touching Linux dts(i) files which indeed easy for syncing from Linux between releases. These board specific -u-boot.dtsi can be extendible to add more u-boot specific nodes or properties in future. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
80 lines
1.5 KiB
Plaintext
80 lines
1.5 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Google Gru-Bob Rev 4+ board device tree source
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*
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* Copyright 2018 Google, Inc
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*/
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/dts-v1/;
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#include "rk3399-gru-chromebook.dtsi"
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/ {
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model = "Google Bob";
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compatible = "google,bob-rev13", "google,bob-rev12",
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"google,bob-rev11", "google,bob-rev10",
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"google,bob-rev9", "google,bob-rev8",
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"google,bob-rev7", "google,bob-rev6",
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"google,bob-rev5", "google,bob-rev4",
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"google,bob", "google,gru", "rockchip,rk3399";
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edp_panel: edp-panel {
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compatible = "boe,nv101wxmn51", "simple-panel";
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backlight = <&backlight>;
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power-supply = <&pp3300_disp>;
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ports {
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panel_in_edp: endpoint {
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remote-endpoint = <&edp_out_panel>;
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};
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};
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};
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};
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&ap_i2c_ts {
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touchscreen: touchscreen@10 {
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compatible = "elan,ekth3500";
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reg = <0x10>;
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interrupt-parent = <&gpio3>;
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interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&touch_int_l &touch_reset_l>;
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reset-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
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};
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};
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&ap_i2c_tp {
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trackpad: trackpad@15 {
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compatible = "elan,ekth3000";
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reg = <0x15>;
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interrupt-parent = <&gpio1>;
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interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&trackpad_int_l>;
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wakeup-source;
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};
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};
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&backlight {
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pwms = <&cros_ec_pwm 0>;
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};
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&cpu_alert0 {
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temperature = <65000>;
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};
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&cpu_alert1 {
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temperature = <70000>;
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};
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&spi0 {
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status = "okay";
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};
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&pinctrl {
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tpm {
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h1_int_od_l: h1-int-od-l {
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rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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};
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