mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-06 03:06:16 +09:00
dcfd37e5ef
The change adds support of LPC32xx SLC NAND controller. LPC32xx SoC has two different mutually exclusive NAND controllers to communicate with single and multiple layer chips. This simple driver allows to specify NAND chip timings and defines custom read_buf()/write_buf() operations, because access to 8-bit data register must be 32-bit aligned. Support of hardware ECC calculation is not implemented (data correction is always done by software), since it requires a working DMA engine. The driver can be included to an SPL image. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Scott Wood <scottwood@freescale.com> Tested-by: Sylvain Lemieux <slemieux@tycoint.com>
80 lines
2.3 KiB
Makefile
80 lines
2.3 KiB
Makefile
#
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# (C) Copyright 2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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ifdef CONFIG_SPL_BUILD
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ifdef CONFIG_SPL_NAND_DRIVERS
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NORMAL_DRIVERS=y
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endif
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obj-$(CONFIG_SPL_NAND_AM33XX_BCH) += am335x_spl_bch.o
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obj-$(CONFIG_SPL_NAND_SUNXI) += sunxi_nand_spl.o
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obj-$(CONFIG_SPL_NAND_DENALI) += denali_spl.o
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obj-$(CONFIG_SPL_NAND_DOCG4) += docg4_spl.o
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obj-$(CONFIG_SPL_NAND_SIMPLE) += nand_spl_simple.o
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obj-$(CONFIG_SPL_NAND_LOAD) += nand_spl_load.o
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obj-$(CONFIG_SPL_NAND_ECC) += nand_ecc.o
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obj-$(CONFIG_SPL_NAND_BASE) += nand_base.o
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obj-$(CONFIG_SPL_NAND_INIT) += nand.o
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ifeq ($(CONFIG_SPL_ENV_SUPPORT),y)
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obj-$(CONFIG_ENV_IS_IN_NAND) += nand_util.o
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endif
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else # not spl
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NORMAL_DRIVERS=y
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obj-y += nand.o
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obj-y += nand_bbt.o
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obj-y += nand_ids.o
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obj-y += nand_util.o
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obj-y += nand_ecc.o
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obj-y += nand_base.o
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endif # not spl
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ifdef NORMAL_DRIVERS
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obj-$(CONFIG_NAND_ECC_BCH) += nand_bch.o
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obj-$(CONFIG_NAND_ATMEL) += atmel_nand.o
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obj-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o
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obj-$(CONFIG_NAND_DAVINCI) += davinci_nand.o
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obj-$(CONFIG_NAND_DENALI) += denali.o
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obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o
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obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_nand.o
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obj-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o
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obj-$(CONFIG_NAND_FSMC) += fsmc_nand.o
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obj-$(CONFIG_NAND_JZ4740) += jz4740_nand.o
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obj-$(CONFIG_NAND_KB9202) += kb9202_nand.o
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obj-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o
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obj-$(CONFIG_NAND_KMETER1) += kmeter1_nand.o
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obj-$(CONFIG_NAND_LPC32XX_MLC) += lpc32xx_nand_mlc.o
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obj-$(CONFIG_NAND_LPC32XX_SLC) += lpc32xx_nand_slc.o
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obj-$(CONFIG_NAND_MPC5121_NFC) += mpc5121_nfc.o
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obj-$(CONFIG_NAND_VF610_NFC) += vf610_nfc.o
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obj-$(CONFIG_NAND_MXC) += mxc_nand.o
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obj-$(CONFIG_NAND_MXS) += mxs_nand.o
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obj-$(CONFIG_NAND_NDFC) += ndfc.o
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obj-$(CONFIG_NAND_NOMADIK) += nomadik.o
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obj-$(CONFIG_NAND_S3C2410) += s3c2410_nand.o
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obj-$(CONFIG_NAND_SPEAR) += spr_nand.o
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obj-$(CONFIG_TEGRA_NAND) += tegra_nand.o
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obj-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o
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obj-$(CONFIG_NAND_OMAP_ELM) += omap_elm.o
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obj-$(CONFIG_NAND_PLAT) += nand_plat.o
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obj-$(CONFIG_NAND_DOCG4) += docg4.o
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else # minimal SPL drivers
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obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_spl.o
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obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_spl.o
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obj-$(CONFIG_NAND_MXC) += mxc_nand_spl.o
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obj-$(CONFIG_NAND_MXS) += mxs_nand_spl.o mxs_nand.o
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endif # drivers
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