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https://github.com/brain-hackers/u-boot-brain
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![Stefano Babic](/assets/img/avatar_default.png)
Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
151 lines
5.6 KiB
C
151 lines
5.6 KiB
C
/*
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* Copyright (C) 2012-2015 Freescale Semiconductor, Inc. All Rights Reserved.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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*/
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#ifndef __SECURE_MX6Q_H__
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#define __SECURE_MX6Q_H__
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#include <linux/types.h>
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/* -------- start of HAB API updates ------------*/
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/* The following are taken from HAB4 SIS */
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/* Status definitions */
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enum hab_status {
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HAB_STS_ANY = 0x00,
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HAB_FAILURE = 0x33,
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HAB_WARNING = 0x69,
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HAB_SUCCESS = 0xf0
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};
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/* Security Configuration definitions */
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enum hab_config {
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HAB_CFG_RETURN = 0x33, /* < Field Return IC */
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HAB_CFG_OPEN = 0xf0, /* < Non-secure IC */
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HAB_CFG_CLOSED = 0xcc /* < Secure IC */
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};
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/* State definitions */
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enum hab_state {
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HAB_STATE_INITIAL = 0x33, /* Initialising state (transitory) */
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HAB_STATE_CHECK = 0x55, /* Check state (non-secure) */
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HAB_STATE_NONSECURE = 0x66, /* Non-secure state */
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HAB_STATE_TRUSTED = 0x99, /* Trusted state */
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HAB_STATE_SECURE = 0xaa, /* Secure state */
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HAB_STATE_FAIL_SOFT = 0xcc, /* Soft fail state */
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HAB_STATE_FAIL_HARD = 0xff, /* Hard fail state (terminal) */
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HAB_STATE_NONE = 0xf0, /* No security state machine */
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HAB_STATE_MAX
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};
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enum hab_reason {
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HAB_RSN_ANY = 0x00, /* Match any reason */
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HAB_ENG_FAIL = 0x30, /* Engine failure */
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HAB_INV_ADDRESS = 0x22, /* Invalid address: access denied */
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HAB_INV_ASSERTION = 0x0c, /* Invalid assertion */
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HAB_INV_CALL = 0x28, /* Function called out of sequence */
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HAB_INV_CERTIFICATE = 0x21, /* Invalid certificate */
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HAB_INV_COMMAND = 0x06, /* Invalid command: command malformed */
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HAB_INV_CSF = 0x11, /* Invalid csf */
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HAB_INV_DCD = 0x27, /* Invalid dcd */
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HAB_INV_INDEX = 0x0f, /* Invalid index: access denied */
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HAB_INV_IVT = 0x05, /* Invalid ivt */
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HAB_INV_KEY = 0x1d, /* Invalid key */
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HAB_INV_RETURN = 0x1e, /* Failed callback function */
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HAB_INV_SIGNATURE = 0x18, /* Invalid signature */
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HAB_INV_SIZE = 0x17, /* Invalid data size */
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HAB_MEM_FAIL = 0x2e, /* Memory failure */
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HAB_OVR_COUNT = 0x2b, /* Expired poll count */
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HAB_OVR_STORAGE = 0x2d, /* Exhausted storage region */
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HAB_UNS_ALGORITHM = 0x12, /* Unsupported algorithm */
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HAB_UNS_COMMAND = 0x03, /* Unsupported command */
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HAB_UNS_ENGINE = 0x0a, /* Unsupported engine */
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HAB_UNS_ITEM = 0x24, /* Unsupported configuration item */
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HAB_UNS_KEY = 0x1b, /* Unsupported key type/parameters */
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HAB_UNS_PROTOCOL = 0x14, /* Unsupported protocol */
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HAB_UNS_STATE = 0x09, /* Unsuitable state */
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HAB_RSN_MAX
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};
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enum hab_context {
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HAB_CTX_ANY = 0x00, /* Match any context */
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HAB_CTX_FAB = 0xff, /* Event logged in hab_fab_test() */
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HAB_CTX_ENTRY = 0xe1, /* Event logged in hab_rvt.entry() */
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HAB_CTX_TARGET = 0x33, /* Event logged in hab_rvt.check_target() */
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HAB_CTX_AUTHENTICATE = 0x0a,/* Logged in hab_rvt.authenticate_image() */
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HAB_CTX_DCD = 0xdd, /* Event logged in hab_rvt.run_dcd() */
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HAB_CTX_CSF = 0xcf, /* Event logged in hab_rvt.run_csf() */
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HAB_CTX_COMMAND = 0xc0, /* Event logged executing csf/dcd command */
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HAB_CTX_AUT_DAT = 0xdb, /* Authenticated data block */
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HAB_CTX_ASSERT = 0xa0, /* Event logged in hab_rvt.assert() */
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HAB_CTX_EXIT = 0xee, /* Event logged in hab_rvt.exit() */
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HAB_CTX_MAX
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};
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struct imx_sec_config_fuse_t {
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int bank;
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int word;
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};
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#if defined(CONFIG_SECURE_BOOT)
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extern struct imx_sec_config_fuse_t const imx_sec_config_fuse;
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#endif
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/*Function prototype description*/
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typedef enum hab_status hab_rvt_report_event_t(enum hab_status, uint32_t,
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uint8_t* , size_t*);
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typedef enum hab_status hab_rvt_report_status_t(enum hab_config *,
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enum hab_state *);
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typedef enum hab_status hab_loader_callback_f_t(void**, size_t*, const void*);
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typedef enum hab_status hab_rvt_entry_t(void);
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typedef enum hab_status hab_rvt_exit_t(void);
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typedef void *hab_rvt_authenticate_image_t(uint8_t, ptrdiff_t,
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void **, size_t *, hab_loader_callback_f_t);
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typedef void hapi_clock_init_t(void);
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#define HAB_ENG_ANY 0x00 /* Select first compatible engine */
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#define HAB_ENG_SCC 0x03 /* Security controller */
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#define HAB_ENG_RTIC 0x05 /* Run-time integrity checker */
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#define HAB_ENG_SAHARA 0x06 /* Crypto accelerator */
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#define HAB_ENG_CSU 0x0a /* Central Security Unit */
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#define HAB_ENG_SRTC 0x0c /* Secure clock */
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#define HAB_ENG_DCP 0x1b /* Data Co-Processor */
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#define HAB_ENG_CAAM 0x1d /* CAAM */
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#define HAB_ENG_SNVS 0x1e /* Secure Non-Volatile Storage */
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#define HAB_ENG_OCOTP 0x21 /* Fuse controller */
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#define HAB_ENG_DTCP 0x22 /* DTCP co-processor */
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#define HAB_ENG_ROM 0x36 /* Protected ROM area */
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#define HAB_ENG_HDCP 0x24 /* HDCP co-processor */
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#define HAB_ENG_RTL 0x77 /* RTL simulation engine */
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#define HAB_ENG_SW 0xff /* Software engine */
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#ifdef CONFIG_ROM_UNIFIED_SECTIONS
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#define HAB_RVT_BASE 0x00000100
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#else
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#define HAB_RVT_BASE 0x00000094
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#endif
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#define HAB_RVT_ENTRY (*(uint32_t *)(HAB_RVT_BASE + 0x04))
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#define HAB_RVT_EXIT (*(uint32_t *)(HAB_RVT_BASE + 0x08))
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#define HAB_RVT_AUTHENTICATE_IMAGE (*(uint32_t *)(HAB_RVT_BASE + 0x10))
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#define HAB_RVT_REPORT_EVENT (*(uint32_t *)(HAB_RVT_BASE + 0x20))
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#define HAB_RVT_REPORT_STATUS (*(uint32_t *)(HAB_RVT_BASE + 0x24))
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#define HAB_RVT_REPORT_EVENT_NEW (*(uint32_t *)0x000000B8)
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#define HAB_RVT_REPORT_STATUS_NEW (*(uint32_t *)0x000000BC)
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#define HAB_RVT_AUTHENTICATE_IMAGE_NEW (*(uint32_t *)0x000000A8)
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#define HAB_RVT_ENTRY_NEW (*(uint32_t *)0x0000009C)
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#define HAB_RVT_EXIT_NEW (*(uint32_t *)0x000000A0)
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#define HAB_CID_ROM 0 /**< ROM Caller ID */
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#define HAB_CID_UBOOT 1 /**< UBOOT Caller ID*/
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/* ----------- end of HAB API updates ------------*/
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uint32_t authenticate_image(uint32_t ddr_start, uint32_t image_size);
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#endif
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