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![Wolfgang Denk](/assets/img/avatar_default.png)
Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
169 lines
3.6 KiB
C
169 lines
3.6 KiB
C
/*
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* (C) Copyright 2010
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* Matthias Weisser <weisserm@arcor.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/*
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* mb86r0xgdc.c - Graphic interface for Fujitsu MB86R0x integrated graphic
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* controller.
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*/
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#include <common.h>
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#include <malloc.h>
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#include <asm/io.h>
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#include <asm/arch/hardware.h>
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#include <video_fb.h>
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#include "videomodes.h"
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/*
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* 4MB (at the end of system RAM)
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*/
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#define VIDEO_MEM_SIZE 0x400000
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#define FB_SYNC_CLK_INV (1<<16) /* pixel clock inverted */
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/*
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* Graphic Device
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*/
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static GraphicDevice mb86r0x;
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static void dsp_init(struct mb86r0x_gdc_dsp *dsp, char *modestr,
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u32 *videomem)
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{
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struct ctfb_res_modes var_mode;
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u32 dcm1, dcm2, dcm3;
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u16 htp, hdp, hdb, hsp, vtr, vsp, vdp;
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u8 hsw, vsw;
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u32 l2m, l2em, l2oa0, l2da0, l2oa1, l2da1;
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u16 l2dx, l2dy, l2wx, l2wy, l2ww, l2wh;
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unsigned long div;
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int bpp;
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bpp = video_get_params(&var_mode, modestr);
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if (bpp == 0) {
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var_mode.xres = 640;
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var_mode.yres = 480;
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var_mode.pixclock = 39721; /* 25MHz */
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var_mode.left_margin = 48;
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var_mode.right_margin = 16;
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var_mode.upper_margin = 33;
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var_mode.lower_margin = 10;
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var_mode.hsync_len = 96;
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var_mode.vsync_len = 2;
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var_mode.sync = 0;
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var_mode.vmode = 0;
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bpp = 15;
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}
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/* Fill memory with white */
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memset(videomem, 0xFF, var_mode.xres * var_mode.yres * 2);
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mb86r0x.winSizeX = var_mode.xres;
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mb86r0x.winSizeY = var_mode.yres;
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/* LCD base clock is ~ 660MHZ. We do calculations in kHz */
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div = 660000 / (1000000000L / var_mode.pixclock);
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if (div > 64)
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div = 64;
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if (0 == div)
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div = 1;
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dcm1 = (div - 1) << 8;
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dcm2 = 0x00000000;
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if (var_mode.sync & FB_SYNC_CLK_INV)
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dcm3 = 0x00000100;
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else
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dcm3 = 0x00000000;
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htp = var_mode.left_margin + var_mode.xres +
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var_mode.hsync_len + var_mode.right_margin;
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hdp = var_mode.xres;
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hdb = var_mode.xres;
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hsp = var_mode.xres + var_mode.right_margin;
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hsw = var_mode.hsync_len;
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vsw = var_mode.vsync_len;
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vtr = var_mode.upper_margin + var_mode.yres +
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var_mode.vsync_len + var_mode.lower_margin;
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vsp = var_mode.yres + var_mode.lower_margin;
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vdp = var_mode.yres;
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l2m = ((var_mode.yres - 1) << (0)) |
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(((var_mode.xres * 2) / 64) << (16)) |
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((1) << (31));
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l2em = (1 << 0) | (1 << 1);
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l2oa0 = mb86r0x.frameAdrs;
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l2da0 = mb86r0x.frameAdrs;
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l2oa1 = mb86r0x.frameAdrs;
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l2da1 = mb86r0x.frameAdrs;
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l2dx = 0;
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l2dy = 0;
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l2wx = 0;
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l2wy = 0;
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l2ww = var_mode.xres;
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l2wh = var_mode.yres - 1;
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writel(dcm1, &dsp->dcm1);
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writel(dcm2, &dsp->dcm2);
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writel(dcm3, &dsp->dcm3);
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writew(htp, &dsp->htp);
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writew(hdp, &dsp->hdp);
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writew(hdb, &dsp->hdb);
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writew(hsp, &dsp->hsp);
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writeb(hsw, &dsp->hsw);
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writeb(vsw, &dsp->vsw);
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writew(vtr, &dsp->vtr);
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writew(vsp, &dsp->vsp);
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writew(vdp, &dsp->vdp);
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writel(l2m, &dsp->l2m);
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writel(l2em, &dsp->l2em);
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writel(l2oa0, &dsp->l2oa0);
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writel(l2da0, &dsp->l2da0);
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writel(l2oa1, &dsp->l2oa1);
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writel(l2da1, &dsp->l2da1);
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writew(l2dx, &dsp->l2dx);
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writew(l2dy, &dsp->l2dy);
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writew(l2wx, &dsp->l2wx);
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writew(l2wy, &dsp->l2wy);
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writew(l2ww, &dsp->l2ww);
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writew(l2wh, &dsp->l2wh);
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writel(dcm1 | (1 << 18) | (1 << 31), &dsp->dcm1);
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}
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void *video_hw_init(void)
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{
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struct mb86r0x_gdc *gdc = (struct mb86r0x_gdc *) MB86R0x_GDC_BASE;
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GraphicDevice *pGD = &mb86r0x;
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char *s;
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u32 *vid;
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memset(pGD, 0, sizeof(GraphicDevice));
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pGD->gdfIndex = GDF_15BIT_555RGB;
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pGD->gdfBytesPP = 2;
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pGD->memSize = VIDEO_MEM_SIZE;
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pGD->frameAdrs = PHYS_SDRAM + PHYS_SDRAM_SIZE - VIDEO_MEM_SIZE;
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vid = (u32 *)pGD->frameAdrs;
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s = getenv("videomode");
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if (s != NULL)
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dsp_init(&gdc->dsp0, s, vid);
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s = getenv("videomode1");
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if (s != NULL)
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dsp_init(&gdc->dsp1, s, vid);
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return pGD;
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}
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