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54afb50025
stv0991 has cadence qspi controller for flash interfacing, this patch configures the device pads & clock for the controller. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Reviewed-by: Jagannadh Teki <jteki@openedev.com>
47 lines
857 B
C
47 lines
857 B
C
/*
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* (C) Copyright 2014
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* Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_ARM_ARCH_PERIPH_H
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#define __ASM_ARM_ARCH_PERIPH_H
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/*
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* Peripherals required for pinmux configuration. List will
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* grow with support for more devices getting added.
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* Numbering based on interrupt table.
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*
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*/
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enum periph_id {
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UART_GPIOC_30_31 = 0,
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UART_GPIOB_16_17,
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ETH_GPIOB_10_31_C_0_4,
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QSPI_CS_CLK_PAD,
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PERIPH_ID_I2C0,
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PERIPH_ID_I2C1,
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PERIPH_ID_I2C2,
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PERIPH_ID_I2C3,
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PERIPH_ID_I2C4,
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PERIPH_ID_I2C5,
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PERIPH_ID_I2C6,
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PERIPH_ID_I2C7,
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PERIPH_ID_SPI0,
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PERIPH_ID_SPI1,
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PERIPH_ID_SPI2,
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PERIPH_ID_SDMMC0,
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PERIPH_ID_SDMMC1,
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PERIPH_ID_SDMMC2,
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PERIPH_ID_SDMMC3,
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PERIPH_ID_I2S1,
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};
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enum periph_clock {
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UART_CLOCK_CFG = 0,
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ETH_CLOCK_CFG,
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QSPI_CLOCK_CFG,
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};
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#endif /* __ASM_ARM_ARCH_PERIPH_H */
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