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https://github.com/brain-hackers/u-boot-brain
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When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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| Kconfig | ||
| MAINTAINERS | ||
| Makefile | ||
| mpc8313erdb.c | ||
| README | ||
| sdram.c | ||
Freescale MPC8313ERDB Board ----------------------------------------- 1. Board Switches and Jumpers S3 is used to set CONFIG_SYS_RESET_SOURCE. To boot the image at 0xFE000000 in NOR flash, use these DIP switch settings for S3 S4: +------+ +------+ | | | **** | | **** | | | +------+ ON +------+ ON 4321 4321 (where the '*' indicates the position of the tab of the switch.) To boot the image at the beginning of NAND flash, use these DIP switch settings for S3 S4: +------+ +------+ | * | | *** | | *** | | * | +------+ ON +------+ ON 4321 4321 (where the '*' indicates the position of the tab of the switch.) When booting from NAND, use u-boot-nand.bin, not u-boot.bin. 2. Memory Map The memory map looks like this: 0x0000_0000 0x07ff_ffff DDR 128M 0x8000_0000 0x8fff_ffff PCI MEM 256M 0x9000_0000 0x9fff_ffff PCI_MMIO 256M 0xe000_0000 0xe00f_ffff IMMR 1M 0xe200_0000 0xe20f_ffff PCI IO 16M 0xe280_0000 0xe280_7fff NAND FLASH (CS1) 32K 0xf000_0000 0xf001_ffff VSC7385 (CS2) 128K 0xfa00_0000 0xfa00_7fff Board Status/ 32K LED Control (CS3) 0xfe00_0000 0xfe7f_ffff NOR FLASH (CS0) 8M When booting from NAND, NAND flash is CS0 and NOR flash is CS1. 3. Definitions 3.1 Explanation of NEW definitions in: include/configs/MPC8313ERDB.h CONFIG_MPC83xx MPC83xx family CONFIG_MPC831x MPC831x specific CONFIG_MPC8313ERDB MPC8313ERDB board specific 4. Compilation Assuming you're using BASH (or similar) as your shell: export CROSS_COMPILE=your-cross-compiler-prefix- make distclean make MPC8313ERDB_XXX_config (where XXX is: 33 - 33 MHz oscillator, boot from NOR flash 66 - 66 MHz oscillator, boot from NOR flash NAND_33 - 33 MHz oscillator, boot from NAND flash NAND_66 - 66 MHz oscillator, boot from NAND flash) make 5. Downloading and Flashing Images 5.1 Reflash U-Boot Image using U-Boot NOR flash: =>run tftpflash You may want to try =>tftpboot $loadaddr $uboot first, to make sure that the TFTP load will succeed before it goes ahead and wipes out your current firmware. And of course, have an alternate means of programming the flash available if the new U-Boot doesn't boot. NAND flash: =>tftpboot $loadaddr <filename> =>nand erase 0 0x80000 =>nand write $loadaddr 0 0x80000 ...where 0x80000 is the filesize rounded up to the next 0x20000 increment. 5.2 Downloading and Booting Linux Kernel Ensure that all networking-related environment variables are set properly (including ipaddr, serverip, gatewayip (if needed), netmask, ethaddr, eth1addr, rootpath (if using NFS root), fdtfile, and bootfile). Then, do one of the following, depending on whether you want an NFS root or a ramdisk root: =>run nfsboot or =>run ramboot 6 Notes The console baudrate for MPC8313ERDB is 115200bps.