York Sun d8556db1d4 powerpc/mpc8xxx: Set inactive csn_bnds to 0xffffffff ... When chip select interleaving is enabled, cs0_bnds is used for address binding. Other csn_bnds are not used. When two controllers interleaving is enabled, cs0_bnds of both controllers are used, other csn_bnds are not. However, the unused csn_bnds may be used internally for calculating addresses for calibration. Setting those registers to 0 may confuse controllers in some cases. Instead, setting them to 0xffffffff together with normal LAWs will guarantee the address is not mapped to DDR. Signed-off-by: York Sun <yorksun@freescale.com>		2013-08-09 12:41:39 -07:00
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arm	config: don't define CONFIG_ARCH_DEVICE_TREE	2013-08-02 18:30:11 -04:00
avr32	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
blackfin	blackfin: Fix using gd->baudrate before setting its value	2013-07-31 16:56:04 +08:00
m68k	Merge branch 'master' of git://git.denx.de/u-boot-i2c	2013-07-24 09:50:24 -04:00
microblaze	config: don't define CONFIG_ARCH_DEVICE_TREE	2013-08-02 18:30:11 -04:00
mips	MIPS: mips32/cache.S: use v1 register for indirect function calls	2013-07-24 09:51:07 -04:00
nds32	Merge branch 'master' of git://git.denx.de/u-boot-nds32	2013-07-25 08:51:51 -04:00
nios2	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
openrisc	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
powerpc	powerpc/mpc8xxx: Set inactive csn_bnds to 0xffffffff	2013-08-09 12:41:39 -07:00
sandbox	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
sh	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
sparc	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
x86	config: don't define CONFIG_ARCH_DEVICE_TREE	2013-08-02 18:30:11 -04:00
.gitignore	update include/asm/ gitignore after move	2010-05-07 00:17:30 +02:00