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https://github.com/brain-hackers/u-boot-brain
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154b5484ac
Update chipselect handling in davinci_nand.c so that it can handle 2 GByte chips the same way Linux does: as one device, even though it has two halves with independent chip selects. For such chips the "nand info" command reports: Device 0: 2x nand0, sector size 128 KiB Switch to use the default chipselect function unless the board really needs its own. The logic for the Sonata board moves out of the driver into board-specific code. (Which doesn't affect current build breakage if its NAND support is enabled...) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Scott Wood <scottwood@freescale.com>
46 lines
1.3 KiB
C
46 lines
1.3 KiB
C
/*
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* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
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*
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* Parts shamelesly stolen from Linux Kernel source tree.
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*
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* ------------------------------------------------------------
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _NAND_DEFS_H_
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#define _NAND_DEFS_H_
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#include <asm/arch/hardware.h>
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#ifdef CONFIG_SOC_DM646x
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#define MASK_CLE 0x80000
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#define MASK_ALE 0x40000
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#else
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#define MASK_CLE 0x10
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#define MASK_ALE 0x08
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#endif
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#define NAND_READ_START 0x00
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#define NAND_READ_END 0x30
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#define NAND_STATUS 0x70
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extern void davinci_nand_init(struct nand_chip *nand);
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#endif
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