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u-boot-brain/arch/arm/mach-at91/include
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Samuel Mescoff f7cf291aa7 ARM: at91: sama5d2: configure the L2 cache memory 
The SAMA5D2 has a second internal SRAM that can be reassigned as a L2
cache memory.
Make sure it is configured as a L2 cache memory when booting from a SPL
image.

Based on the commit b5ea95ef2b5b from the at91bootstrap repository.

Signed-off-by: Samuel Mescoff <samuel.mescoff@mobile-devices.fr>
Reviewed-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-18 21:34:41 +01:00
..
mach ARM: at91: sama5d2: configure the L2 cache memory 2016-02-18 21:34:41 +01:00