mirror of
https://github.com/brain-hackers/u-boot-brain
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855a496fe9
- Fix Gigabit Ethernet support for 440GX - Add Gigabit Ethernet Support to MII PHY utilities * Patch by Brad Kemp, 12 Mar 2004: Fixes for drivers/cfi_flash.c: - Better support for x8/x16 implementations - Added failure for AMD chips attempting to use CFG_FLASH_USE_BUFFER_WRITE - Added defines for AMD command and address constants * Patch by Leon Kukovec, 12 Mar 2004: Fix get_dentfromdir() to correctly handle deleted dentries * Patch by George G. Davis, 11 Mar 2004: Remove hard coded network settings in TI OMAP1610 H2 default board config * Patch by George G. Davis, 11 Mar 2004: add support for ADS GraphicsClient+ board.
74 lines
2.0 KiB
C
74 lines
2.0 KiB
C
/*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* 2003-2004 (c) MontaVista Software, Inc.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <SA-1100.h>
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/* ------------------------------------------------------------------------- */
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/*
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* Miscelaneous platform dependent initialisations
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*/
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int
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board_init(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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gd->bd->bi_arch_number = 29; /* ADS GraphicsClientPlus Board */
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gd->bd->bi_boot_params = 0xc000003c; /* Weird address? */
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/* Most of the ADS GCPlus I/O is connected to Static nCS2.
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* So I'm brute forcing nCS2 timiming here for worst case.
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*/
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MSC1 &= ~0xFFFF;
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MSC1 |= 0x8649;
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/* Nothing is connected to Static nCS4 or nCS5. But I'm using
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* nCS4 as a paranoia safe guard to force nCS2, nOE; nWE high
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* after accessing I/O via (non-VLIO) nCS2. What can I say, I'm
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* paranoid and lack decent tools to alleviate my fear. I sure
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* do wish I had a logic analyzer. : (
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*/
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MSC2 = 0xfff9fff9;
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return 0;
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}
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int
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dram_init(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
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gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
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return (0);
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}
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