mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-11 21:56:21 +09:00
be277c3a89
We can have the case where u-boot is launched after some other low level enabler, like for example when u-boot runs after arm-trusted-firmware and/or optee. So, because of that we may need to jump the initialization of some IP blocks even because we may no longer have the permission for that. So, if the config option to skip low level init is set disable also timer, board and csu initialization. Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Peng Fan <peng.fan@nxp.com> Cc: u-boot@lists.denx.de Reviewed-by: Peng Fan <peng.fan@nxp.com>
128 lines
2.4 KiB
C
128 lines
2.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2015 Freescale Semiconductor, Inc.
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*
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* The file use ls102xa/timer.c as a reference.
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <div64.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/mach-imx/syscounter.h>
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* This function is intended for SHORT delays only.
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* It will overflow at around 10 seconds @ 400MHz,
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* or 20 seconds @ 200MHz.
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*/
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unsigned long usec2ticks(unsigned long usec)
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{
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ulong ticks;
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if (usec < 1000)
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ticks = ((usec * (get_tbclk()/1000)) + 500) / 1000;
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else
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ticks = ((usec / 10) * (get_tbclk() / 100000));
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return ticks;
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}
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static inline unsigned long long tick_to_time(unsigned long long tick)
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{
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unsigned long freq;
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asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
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tick *= CONFIG_SYS_HZ;
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do_div(tick, freq);
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return tick;
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}
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static inline unsigned long long us_to_tick(unsigned long long usec)
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{
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unsigned long freq;
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asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
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usec = usec * freq + 999999;
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do_div(usec, 1000000);
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return usec;
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}
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#ifndef CONFIG_SKIP_LOWLEVEL_INIT
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int timer_init(void)
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{
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struct sctr_regs *sctr = (struct sctr_regs *)SCTR_BASE_ADDR;
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unsigned long val, freq;
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freq = CONFIG_SC_TIMER_CLK;
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asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
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writel(freq, &sctr->cntfid0);
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/* Enable system counter */
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val = readl(&sctr->cntcr);
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val &= ~(SC_CNTCR_FREQ0 | SC_CNTCR_FREQ1);
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val |= SC_CNTCR_FREQ0 | SC_CNTCR_ENABLE | SC_CNTCR_HDBG;
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writel(val, &sctr->cntcr);
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gd->arch.tbl = 0;
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gd->arch.tbu = 0;
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return 0;
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}
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#endif
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unsigned long long get_ticks(void)
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{
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unsigned long long now;
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asm volatile("mrrc p15, 0, %Q0, %R0, c14" : "=r" (now));
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gd->arch.tbl = (unsigned long)(now & 0xffffffff);
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gd->arch.tbu = (unsigned long)(now >> 32);
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return now;
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}
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ulong get_timer_masked(void)
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{
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return tick_to_time(get_ticks());
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}
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ulong get_timer(ulong base)
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{
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return get_timer_masked() - base;
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}
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void __udelay(unsigned long usec)
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{
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unsigned long long tmp;
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ulong tmo;
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tmo = us_to_tick(usec);
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tmp = get_ticks() + tmo; /* get current timestamp */
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while (get_ticks() < tmp) /* loop till event */
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/*NOP*/;
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}
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/*
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* This function is derived from PowerPC code (timebase clock frequency).
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* On ARM it returns the number of timer ticks per second.
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*/
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ulong get_tbclk(void)
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{
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unsigned long freq;
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asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
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return freq;
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}
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