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https://github.com/brain-hackers/u-boot-brain
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![Heiko Schocher](/assets/img/avatar_default.png)
move the board/davinci/common/misc.c file to arch/arm/cpu/arm926ejs/davinci/misc.c, so all davinci boards can use this functions. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <tom.rini@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Christian Riesch <christian.riesch@omicron.at>
432 lines
9.8 KiB
C
432 lines
9.8 KiB
C
/*
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* Copyright (C) 2009 Texas Instruments Incorporated
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*
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* Copyright (C) 2011
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* Heiko Schocher, DENX Software Engineering, hs@denx.de.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <common.h>
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#include <linux/mtd/nand.h>
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#include <nand.h>
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#include <miiphy.h>
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#include <netdev.h>
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#include <asm/io.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/nand_defs.h>
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#include <asm/arch/davinci_misc.h>
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#ifdef CONFIG_DAVINCI_MMC
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#include <mmc.h>
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#include <asm/arch/sdmmc_defs.h>
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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#ifndef CONFIG_SPL_BUILD
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static struct davinci_timer *timer =
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(struct davinci_timer *)DAVINCI_TIMER3_BASE;
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static unsigned long get_timer_val(void)
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{
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unsigned long now = readl(&timer->tim34);
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return now;
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}
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static void stop_timer(void)
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{
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writel(0x0, &timer->tcr);
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return;
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}
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int checkboard(void)
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{
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printf("Board: AIT CAM ENC 4XX\n");
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return 0;
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}
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int board_init(void)
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{
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gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
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return 0;
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}
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#ifdef CONFIG_DRIVER_TI_EMAC
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int board_eth_init(bd_t *bis)
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{
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davinci_emac_initialize();
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return 0;
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}
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#endif
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#ifdef CONFIG_NAND_DAVINCI
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static int
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davinci_std_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
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uint8_t *buf, int page)
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{
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struct nand_chip *this = mtd->priv;
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int i, eccsize = chip->ecc.size;
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int eccbytes = chip->ecc.bytes;
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int eccsteps = chip->ecc.steps;
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uint8_t *p = buf;
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uint8_t *oob = chip->oob_poi;
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chip->cmdfunc(mtd, NAND_CMD_READOOB, 0x0, page & this->pagemask);
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chip->read_buf(mtd, oob, mtd->oobsize);
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chip->cmdfunc(mtd, NAND_CMD_READ0, 0x0, page & this->pagemask);
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for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
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int stat;
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chip->ecc.hwctl(mtd, NAND_ECC_READ);
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chip->read_buf(mtd, p, eccsize);
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chip->ecc.hwctl(mtd, NAND_ECC_READSYN);
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if (chip->ecc.prepad)
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oob += chip->ecc.prepad;
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stat = chip->ecc.correct(mtd, p, oob, NULL);
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if (stat == -1)
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mtd->ecc_stats.failed++;
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else
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mtd->ecc_stats.corrected += stat;
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oob += eccbytes;
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if (chip->ecc.postpad)
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oob += chip->ecc.postpad;
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}
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/* Calculate remaining oob bytes */
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i = mtd->oobsize - (oob - chip->oob_poi);
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if (i)
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chip->read_buf(mtd, oob, i);
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return 0;
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}
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static void davinci_std_write_page_syndrome(struct mtd_info *mtd,
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struct nand_chip *chip, const uint8_t *buf)
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{
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unsigned char davinci_ecc_buf[NAND_MAX_OOBSIZE];
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struct nand_chip *this = mtd->priv;
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int i, eccsize = chip->ecc.size;
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int eccbytes = chip->ecc.bytes;
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int eccsteps = chip->ecc.steps;
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int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
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int offset = 0;
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const uint8_t *p = buf;
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uint8_t *oob = chip->oob_poi;
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for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
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chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
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chip->write_buf(mtd, p, eccsize);
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/* Calculate ECC without prepad */
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chip->ecc.calculate(mtd, p, oob + chip->ecc.prepad);
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if (chip->ecc.prepad) {
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offset = (chip->ecc.steps - eccsteps) * chunk;
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memcpy(&davinci_ecc_buf[offset], oob, chip->ecc.prepad);
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oob += chip->ecc.prepad;
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}
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offset = ((chip->ecc.steps - eccsteps) * chunk) +
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chip->ecc.prepad;
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memcpy(&davinci_ecc_buf[offset], oob, eccbytes);
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oob += eccbytes;
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if (chip->ecc.postpad) {
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offset = ((chip->ecc.steps - eccsteps) * chunk) +
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chip->ecc.prepad + eccbytes;
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memcpy(&davinci_ecc_buf[offset], oob,
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chip->ecc.postpad);
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oob += chip->ecc.postpad;
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}
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}
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/*
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* Write the sparebytes into the page once
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* all eccsteps have been covered
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*/
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for (i = 0; i < mtd->oobsize; i++)
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writeb(davinci_ecc_buf[i], this->IO_ADDR_W);
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/* Calculate remaining oob bytes */
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i = mtd->oobsize - (oob - chip->oob_poi);
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if (i)
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chip->write_buf(mtd, oob, i);
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}
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static int davinci_std_write_oob_syndrome(struct mtd_info *mtd,
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struct nand_chip *chip, int page)
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{
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int pos, status = 0;
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const uint8_t *bufpoi = chip->oob_poi;
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pos = mtd->writesize;
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chip->cmdfunc(mtd, NAND_CMD_SEQIN, pos, page);
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chip->write_buf(mtd, bufpoi, mtd->oobsize);
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chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
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status = chip->waitfunc(mtd, chip);
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return status & NAND_STATUS_FAIL ? -1 : 0;
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}
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static int davinci_std_read_oob_syndrome(struct mtd_info *mtd,
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struct nand_chip *chip, int page, int sndcmd)
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{
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struct nand_chip *this = mtd->priv;
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uint8_t *buf = chip->oob_poi;
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uint8_t *bufpoi = buf;
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chip->cmdfunc(mtd, NAND_CMD_READOOB, 0x0, page & this->pagemask);
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chip->read_buf(mtd, bufpoi, mtd->oobsize);
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return 1;
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}
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static void nand_dm365evm_select_chip(struct mtd_info *mtd, int chip)
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{
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struct nand_chip *this = mtd->priv;
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unsigned long wbase = (unsigned long) this->IO_ADDR_W;
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unsigned long rbase = (unsigned long) this->IO_ADDR_R;
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if (chip == 1) {
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__set_bit(14, &wbase);
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__set_bit(14, &rbase);
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} else {
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__clear_bit(14, &wbase);
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__clear_bit(14, &rbase);
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}
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this->IO_ADDR_W = (void *)wbase;
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this->IO_ADDR_R = (void *)rbase;
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}
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int board_nand_init(struct nand_chip *nand)
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{
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davinci_nand_init(nand);
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nand->select_chip = nand_dm365evm_select_chip;
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return 0;
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}
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struct nand_ecc_ctrl org_ecc;
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static int notsaved = 1;
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static int nand_switch_hw_func(int mode)
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{
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struct nand_chip *nand;
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struct mtd_info *mtd;
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if (nand_curr_device < 0 ||
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nand_curr_device >= CONFIG_SYS_MAX_NAND_DEVICE ||
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!nand_info[nand_curr_device].name) {
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printf("Error: Can't switch hw functions," \
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" no devices available\n");
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return -1;
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}
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mtd = &nand_info[nand_curr_device];
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nand = mtd->priv;
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if (mode == 0) {
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printf("switching to uboot hw functions.\n");
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memcpy(&nand->ecc, &org_ecc, sizeof(struct nand_ecc_ctrl));
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} else {
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/* RBL */
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printf("switching to RBL hw functions.\n");
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if (notsaved == 1) {
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memcpy(&org_ecc, &nand->ecc,
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sizeof(struct nand_ecc_ctrl));
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notsaved = 0;
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}
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nand->ecc.mode = NAND_ECC_HW_SYNDROME;
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nand->ecc.prepad = 6;
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nand->ecc.read_page = davinci_std_read_page_syndrome;
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nand->ecc.write_page = davinci_std_write_page_syndrome;
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nand->ecc.read_oob = davinci_std_read_oob_syndrome;
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nand->ecc.write_oob = davinci_std_write_oob_syndrome;
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}
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return mode;
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}
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static int hwmode;
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static int do_switch_ecc(cmd_tbl_t *cmdtp, int flag, int argc,
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char *const argv[])
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{
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if (argc != 2)
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goto usage;
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if (strncmp(argv[1], "rbl", 2) == 0)
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hwmode = nand_switch_hw_func(1);
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else if (strncmp(argv[1], "uboot", 2) == 0)
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hwmode = nand_switch_hw_func(0);
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else
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goto usage;
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return 0;
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usage:
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printf("Usage: nandrbl %s\n", cmdtp->usage);
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return 1;
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}
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U_BOOT_CMD(
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nandrbl, 2, 1, do_switch_ecc,
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"switch between rbl/uboot NAND ECC calculation algorithm",
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"[rbl/uboot] - Switch between rbl/uboot NAND ECC algorithm"
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);
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#endif /* #ifdef CONFIG_NAND_DAVINCI */
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#ifdef CONFIG_DAVINCI_MMC
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static struct davinci_mmc mmc_sd0 = {
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.reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
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.input_clk = 121500000,
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.host_caps = MMC_MODE_4BIT,
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.voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
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.version = MMC_CTLR_VERSION_2,
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};
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int board_mmc_init(bd_t *bis)
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{
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int err;
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/* Add slot-0 to mmc subsystem */
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err = davinci_mmc_init(bis, &mmc_sd0);
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return err;
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}
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#endif
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int board_late_init(void)
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{
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struct davinci_gpio *gpio = davinci_gpio_bank45;
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/* 24MHz InputClock / 15 prediv -> 1.6 MHz timer running */
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while (get_timer_val() < 0x186a00)
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;
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/* 1 sec reached -> stop timer, clear all LED */
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stop_timer();
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clrbits_le32(&gpio->out_data, CONFIG_CAM_ENC_LED_MASK);
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return 0;
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}
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void reset_phy(void)
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{
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char *name = "GENERIC @ 0x00";
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/* reset the phy */
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miiphy_reset(name, 0x0);
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}
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#else /* #ifndef CONFIG_SPL_BUILD */
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static void cam_enc_4xx_set_all_led(void)
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{
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struct davinci_gpio *gpio = davinci_gpio_bank45;
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setbits_le32(&gpio->out_data, CONFIG_CAM_ENC_LED_MASK);
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}
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/*
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* TIMER 0 is used for tick
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*/
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static struct davinci_timer *timer =
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(struct davinci_timer *)DAVINCI_TIMER3_BASE;
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#define TIMER_LOAD_VAL 0xffffffff
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#define TIM_CLK_DIV 16
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static int cam_enc_4xx_timer_init(void)
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{
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/* We are using timer34 in unchained 32-bit mode, full speed */
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writel(0x0, &timer->tcr);
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writel(0x0, &timer->tgcr);
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writel(0x06 | ((TIM_CLK_DIV - 1) << 8), &timer->tgcr);
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writel(0x0, &timer->tim34);
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writel(TIMER_LOAD_VAL, &timer->prd34);
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writel(2 << 22, &timer->tcr);
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return 0;
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}
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void board_gpio_init(void)
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{
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struct davinci_gpio *gpio;
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cam_enc_4xx_set_all_led();
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cam_enc_4xx_timer_init();
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gpio = davinci_gpio_bank01;
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clrbits_le32(&gpio->dir, ~0xfdfffffe);
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/* clear LED D14 = GPIO25 */
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clrbits_le32(&gpio->out_data, 0x02000000);
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gpio = davinci_gpio_bank23;
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clrbits_le32(&gpio->dir, ~0x5ff0afef);
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/* set GPIO61 to 1 -> intern UART0 as Console */
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setbits_le32(&gpio->out_data, 0x20000000);
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/*
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* PHY out of reset GIO 50 = 1
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* NAND WP off GIO 51 = 1
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*/
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setbits_le32(&gpio->out_data, 0x000c0004);
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gpio = davinci_gpio_bank45;
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clrbits_le32(&gpio->dir, ~(0xdb2fffff) | CONFIG_CAM_ENC_LED_MASK);
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/*
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* clear LED:
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* D17 = GPIO86
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* D11 = GPIO87
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* GPIO88
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* GPIO89
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* D13 = GPIO90
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* GPIO91
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*/
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clrbits_le32(&gpio->out_data, CONFIG_CAM_ENC_LED_MASK);
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gpio = davinci_gpio_bank67;
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clrbits_le32(&gpio->dir, ~0x000007ff);
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}
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/*
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* functions for the post memory test.
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*/
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int arch_memory_test_prepare(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
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{
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*vstart = CONFIG_SYS_SDRAM_BASE;
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*size = PHYS_SDRAM_1_SIZE;
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*phys_offset = 0;
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return 0;
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}
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void arch_memory_failure_handle(void)
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{
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cam_enc_4xx_set_all_led();
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puts("mem failure\n");
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while (1)
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;
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}
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#endif
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