mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
27084c03d3
At present there is only one control for this and it is used for both SPL and TPL. But SPL might have a lot more space than TPL so the extra cost of a full printf() might be acceptable. Split the option into two, providing separate SPL and TPL controls. The TPL setting defaults to the same as SPL. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
70 lines
2.2 KiB
Plaintext
70 lines
2.2 KiB
Plaintext
CONFIG_ARM=y
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CONFIG_TARGET_LS1043ARDB=y
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CONFIG_SYS_TEXT_BASE=0x82000000
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_FSL_LS_PPA=y
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CONFIG_SPL_MMC_SUPPORT=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
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CONFIG_NR_DRAM_BANKS=2
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CONFIG_SPL=y
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CONFIG_SPL_TEXT_BASE=0x10000000
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT"
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CONFIG_SD_BOOT=y
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CONFIG_BOOTDELAY=10
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
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CONFIG_MISC_INIT_R=y
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CONFIG_SPL_BOARD_INIT=y
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
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CONFIG_SPL_WATCHDOG_SUPPORT=y
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CONFIG_CMD_IMLS=y
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CONFIG_CMD_GPT=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_NAND=y
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CONFIG_CMD_SF=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_CACHE=y
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CONFIG_MP=y
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CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_OF_CONTROL=y
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CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_DM=y
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CONFIG_FSL_CAAM=y
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CONFIG_DM_MMC=y
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CONFIG_FSL_ESDHC=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_FLASH_CFI_DRIVER=y
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CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_SPI_FLASH=y
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CONFIG_SF_DEFAULT_BUS=1
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CONFIG_PHYLIB=y
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CONFIG_PHY_AQUANTIA=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_PCI=y
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CONFIG_DM_PCI=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_LAYERSCAPE=y
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CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
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CONFIG_SYS_NS16550=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_USB=y
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CONFIG_DM_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_XHCI_DWC3=y
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# CONFIG_SPL_USE_TINY_PRINTF is not set
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CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
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