mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-17 07:28:51 +09:00
![Stephen Warren](/assets/img/avatar_default.png)
The following changes are made to the clock API: * The concept of "clocks" and "peripheral clocks" are unified; each clock provider now implements a single set of clocks. This provides a simpler conceptual interface to clients, and better aligns with device tree clock bindings. * Clocks are now identified with a single "struct clk", rather than requiring clients to store the clock provider device and clock identity values separately. For simple clock consumers, this isolates clients from internal details of the clock API. * clk.h is split so it only contains the client/consumer API, whereas clk-uclass.h contains the provider API. This aligns with the recently added reset and mailbox APIs. * clk_ops .of_xlate(), .request(), and .free() are added so providers can customize these operations if needed. This also aligns with the recently added reset and mailbox APIs. * clk_disable() is added. * All users of the current clock APIs are updated. * Sandbox clock tests are updated to exercise clock lookup via DT, and clock enable/disable. * rkclk_get_clk() is removed and replaced with standard APIs. Buildman shows no clock-related errors for any board for which buildman can download a toolchain. test/py passes for sandbox (which invokes the dm clk test amongst others). Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
55 lines
1.1 KiB
C
55 lines
1.1 KiB
C
/*
|
|
* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <clk-uclass.h>
|
|
#include <dm/device.h>
|
|
|
|
DECLARE_GLOBAL_DATA_PTR;
|
|
|
|
struct clk_fixed_rate {
|
|
unsigned long fixed_rate;
|
|
};
|
|
|
|
#define to_clk_fixed_rate(dev) ((struct clk_fixed_rate *)dev_get_platdata(dev))
|
|
|
|
static ulong clk_fixed_rate_get_rate(struct clk *clk)
|
|
{
|
|
if (clk->id != 0)
|
|
return -EINVAL;
|
|
|
|
return to_clk_fixed_rate(clk->dev)->fixed_rate;
|
|
}
|
|
|
|
const struct clk_ops clk_fixed_rate_ops = {
|
|
.get_rate = clk_fixed_rate_get_rate,
|
|
};
|
|
|
|
static int clk_fixed_rate_ofdata_to_platdata(struct udevice *dev)
|
|
{
|
|
to_clk_fixed_rate(dev)->fixed_rate =
|
|
fdtdec_get_int(gd->fdt_blob, dev->of_offset,
|
|
"clock-frequency", 0);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct udevice_id clk_fixed_rate_match[] = {
|
|
{
|
|
.compatible = "fixed-clock",
|
|
},
|
|
{ /* sentinel */ }
|
|
};
|
|
|
|
U_BOOT_DRIVER(clk_fixed_rate) = {
|
|
.name = "fixed_rate_clock",
|
|
.id = UCLASS_CLK,
|
|
.of_match = clk_fixed_rate_match,
|
|
.ofdata_to_platdata = clk_fixed_rate_ofdata_to_platdata,
|
|
.platdata_auto_alloc_size = sizeof(struct clk_fixed_rate),
|
|
.ops = &clk_fixed_rate_ops,
|
|
};
|