mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
051c31b7a4
When a previous phase of U-Boot has run we need to adjust the init of subsequent states to avoid messing up the CPU state. Add a new version of the start logic for SPL, when it boots from TPL (start_from tpl.c) and a new version for U-Boot when it boots from SPL. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
50 lines
903 B
ArmAsm
50 lines
903 B
ArmAsm
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* 32-bit x86 Startup Code when running from TPL
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*
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* Copyright 2018 Google, Inc
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* Written by Simon Glass <sjg@chromium.org>
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*/
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#include <config.h>
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.section .text.start
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.code32
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.globl _start
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.type _start, @function
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_start:
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/* Set up memory using the existing stack */
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mov %esp, %eax
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call board_init_f_alloc_reserve
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mov %eax, %esp
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call board_init_f_init_reserve
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xorl %eax, %eax
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call board_init_f
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call board_init_f_r
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/* Should not return here */
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jmp .
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.globl board_init_f_r_trampoline
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.type board_init_f_r_trampoline, @function
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board_init_f_r_trampoline:
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/*
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* TPL has been executed: SDRAM has been initialised, BSS has been
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* cleared.
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*
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* %eax = Address of top of new stack
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*/
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/* Stack grows down from top of SDRAM */
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movl %eax, %esp
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/* Re-enter SPL by calling board_init_f_r() */
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call board_init_f_r
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die:
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hlt
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jmp die
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hlt
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