u-boot-brain/arch/arm/cpu/armv8
Mark Rutland b924d586d7 arm64: zero cntvoff_el2
Currently cntvoff_el2 is initialised with an arbitrary bag of bits
derived from the initial value of cnthctl_el2 on the current CPU. This is
somewhat odd and problematic as some of these bits are UNKNOWN at reset
and may differ across CPUs (which may cause an OS at EL1 to observe time
going backwards across CPUs).

This patch instead initialises cntvoff_el2 with xzr, giving the register
a consistent value of zero on all CPUs.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: David Feng <fenghua@phytium.com.cn>
Cc: Tom Rini <trini@ti.com>
Acked-by: David.Feng <fenghua@phytium.com.cn>
2014-06-09 10:24:02 +02:00
..
cache_v8.c armv8/cache: Change cache invalidate and flush function 2014-04-07 17:43:41 +02:00
cache.S ARMv8: fix bug for flush data cache by set/way 2014-04-07 22:27:22 +02:00
config.mk arm: Switch to -mno-unaligned-access when supported by the compiler 2014-02-26 21:19:32 +01:00
cpu.c arm64: core support 2014-01-09 16:08:44 +01:00
exceptions.S arm64: core support 2014-01-09 16:08:44 +01:00
generic_timer.c arm64: core support 2014-01-09 16:08:44 +01:00
Makefile arm64 patch: gicv3 support 2014-04-08 00:15:12 +02:00
start.S Arm64 fix a bug of vbar_el3 initialization 2014-05-25 15:26:00 +02:00
tlb.S arm64: core support 2014-01-09 16:08:44 +01:00
transition.S arm64: zero cntvoff_el2 2014-06-09 10:24:02 +02:00
u-boot.lds arm64: core support 2014-01-09 16:08:44 +01:00