mirror of
https://github.com/brain-hackers/u-boot-brain
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9b0888ced4
MMC is not initialized in SPL, so it cannot load u-boot.img preventing boot from MMC. Also driver specific functions are guarded with generic configuration options which leads to build failures when device driver is not enabled in config. Fix that by using driver specific defines. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Acked-by: Stefano Babic <sbabic@denx.de>
161 lines
3.3 KiB
C
161 lines
3.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2011
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* Stefano Babic, DENX Software Engineering, sbabic@denx.de.
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*
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* Copyright (C) 2009 TechNexion Ltd.
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*/
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#include <common.h>
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#include <netdev.h>
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#include <asm/io.h>
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#include <asm/arch/mem.h>
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#include <asm/arch/mux.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/omap_gpio.h>
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#include <asm/arch/mmc_host_def.h>
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#include <i2c.h>
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#include <spl.h>
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#include <mmc.h>
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#include <asm/gpio.h>
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#include <usb.h>
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#include <asm/ehci-omap.h>
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#include "twister.h"
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DECLARE_GLOBAL_DATA_PTR;
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/* Timing definitions for Ethernet Controller */
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static const u32 gpmc_smc911[] = {
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NET_GPMC_CONFIG1,
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NET_GPMC_CONFIG2,
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NET_GPMC_CONFIG3,
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NET_GPMC_CONFIG4,
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NET_GPMC_CONFIG5,
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NET_GPMC_CONFIG6,
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};
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static const u32 gpmc_XR16L2751[] = {
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XR16L2751_GPMC_CONFIG1,
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XR16L2751_GPMC_CONFIG2,
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XR16L2751_GPMC_CONFIG3,
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XR16L2751_GPMC_CONFIG4,
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XR16L2751_GPMC_CONFIG5,
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XR16L2751_GPMC_CONFIG6,
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};
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#ifdef CONFIG_USB_EHCI_OMAP
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static struct omap_usbhs_board_data usbhs_bdata = {
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.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
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.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
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.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
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};
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int ehci_hcd_init(int index, enum usb_init_type init,
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struct ehci_hccr **hccr, struct ehci_hcor **hcor)
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{
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return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
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}
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int ehci_hcd_stop(int index)
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{
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return omap_ehci_hcd_stop();
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}
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#endif
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int board_init(void)
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{
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gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
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/* boot param addr */
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gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
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/* Chip select 1 and 3 are used for XR16L2751 UART controller */
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enable_gpmc_cs_config(gpmc_XR16L2751, &gpmc_cfg->cs[1],
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XR16L2751_UART1_BASE, GPMC_SIZE_16M);
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enable_gpmc_cs_config(gpmc_XR16L2751, &gpmc_cfg->cs[3],
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XR16L2751_UART2_BASE, GPMC_SIZE_16M);
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gpio_request(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO, "USB_PHY1_RESET");
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gpio_direction_output(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO, 1);
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return 0;
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}
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#ifndef CONFIG_SPL_BUILD
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int misc_init_r(void)
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{
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char *eth_addr;
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struct tam3517_module_info info;
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int ret;
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omap_die_id_display();
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eth_addr = env_get("ethaddr");
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if (eth_addr)
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return 0;
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TAM3517_READ_EEPROM(&info, ret);
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if (!ret)
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TAM3517_READ_MAC_FROM_EEPROM(&info);
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return 0;
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}
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#endif
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/*
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* Routine: set_muxconf_regs
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* Description: Setting up the configuration Mux registers specific to the
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* hardware. Many pins need to be moved from protect to primary
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* mode.
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*/
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void set_muxconf_regs(void)
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{
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MUX_TWISTER();
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}
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int board_eth_init(bd_t *bis)
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{
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#ifdef CONFIG_DRIVER_TI_EMAC
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davinci_emac_initialize();
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#endif
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/* init cs for extern lan */
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enable_gpmc_cs_config(gpmc_smc911, &gpmc_cfg->cs[5],
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CONFIG_SMC911X_BASE, GPMC_SIZE_16M);
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#ifdef CONFIG_SMC911X
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return smc911x_initialize(0, CONFIG_SMC911X_BASE);
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#else
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return 0;
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#endif
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}
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#if defined(CONFIG_MMC_OMAP_HS)
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int board_mmc_init(bd_t *bis)
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{
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return omap_mmc_init(0, 0, 0, -1, -1);
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}
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#endif
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#ifdef CONFIG_SPL_OS_BOOT
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/*
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* Do board specific preparation before SPL
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* Linux boot
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*/
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void spl_board_prepare_for_linux(void)
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{
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/* init cs for extern lan */
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enable_gpmc_cs_config(gpmc_smc911, &gpmc_cfg->cs[5],
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CONFIG_SMC911X_BASE, GPMC_SIZE_16M);
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}
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int spl_start_uboot(void)
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{
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int val = 0;
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if (!gpio_request(SPL_OS_BOOT_KEY, "U-Boot key")) {
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gpio_direction_input(SPL_OS_BOOT_KEY);
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val = gpio_get_value(SPL_OS_BOOT_KEY);
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gpio_free(SPL_OS_BOOT_KEY);
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}
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return val;
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}
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#endif
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