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https://github.com/brain-hackers/u-boot-brain
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d5854eb822
There's a number of dangling comments in various tegra configs post migrations of various configs so lets clean them up. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Peter.Chubb@data61.csiro.au Cc: Lucas Stach <dev@lynxeye.de> Cc: Stefan Agner <stefan.agner@toradex.com> Cc: Alban Bedel <alban.bedel@avionic-design.de> Cc: Allen Martin <amartin@nvidia.com> Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
42 lines
973 B
C
42 lines
973 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2010-2012
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* NVIDIA Corporation <www.nvidia.com>
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <linux/sizes.h>
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#include "tegra20-common.h"
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/* High-level configuration options */
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#define CONFIG_TEGRA_BOARD_STRING "Compulab Trimslice"
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/* Board-specific serial config */
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#define CONFIG_TEGRA_ENABLE_UARTA
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#define CONFIG_TEGRA_UARTA_GPU
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#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
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#define CONFIG_MACH_TYPE MACH_TYPE_TRIMSLICE
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/* SPI */
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#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
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/* I2C */
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#define CONFIG_SYS_I2C_TEGRA
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/* Environment in SPI */
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#define CONFIG_ENV_SPI_MAX_HZ 48000000
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#define CONFIG_ENV_SPI_MODE SPI_MODE_0
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#define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
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/* 1MiB flash, environment located as high as possible */
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#define CONFIG_ENV_OFFSET (SZ_1M - CONFIG_ENV_SIZE)
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/* USB Host support */
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#define CONFIG_USB_EHCI_TEGRA
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#include "tegra-common-post.h"
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#endif /* __CONFIG_H */
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