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https://github.com/brain-hackers/u-boot-brain
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2f21ce4d54
The following changes were made to sync up the DMA code between the 85xx and 86xx architectures which will make it easier to break out common 8xxx DMA code: 85xx: - Don't set STRANSINT and SPCIORDER fields in SATR register. These bits only have an affect when the SBPATMU bit is set. - Write 0xffffffff instead of 0xfffffff to clear errors in the DMA status register. We may as well clear all 32 bits of the register... 86xx: - Add CONFIG_SYS_MPC86xx_DMA_ADDR define to address DMA registers - Add clearing of errors in the DMA status register when initializing the controller - Clear the channel start bit in the DMA mode register after a transfer Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
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| .. | ||
| cache.S | ||
| config.mk | ||
| cpu_init.c | ||
| cpu.c | ||
| ddr-8641.c | ||
| fdt.c | ||
| interrupts.c | ||
| Makefile | ||
| mp.c | ||
| release.S | ||
| speed.c | ||
| start.S | ||
| traps.c | ||