mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-23 02:18:51 +09:00
![Ley Foon Tan](/assets/img/avatar_default.png)
Restructure reset manager driver in the preparation to support A10. Move the Gen5 specific code to gen5 files. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
32 lines
606 B
C
32 lines
606 B
C
/*
|
|
* Copyright (C) 2013 Altera Corporation <www.altera.com>
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
|
|
#include <common.h>
|
|
#include <asm/io.h>
|
|
#include <asm/arch/reset_manager.h>
|
|
|
|
DECLARE_GLOBAL_DATA_PTR;
|
|
|
|
static const struct socfpga_reset_manager *reset_manager_base =
|
|
(void *)SOCFPGA_RSTMGR_ADDRESS;
|
|
|
|
/*
|
|
* Write the reset manager register to cause reset
|
|
*/
|
|
void reset_cpu(ulong addr)
|
|
{
|
|
/* request a warm reset */
|
|
writel(1 << RSTMGR_CTRL_SWWARMRSTREQ_LSB,
|
|
&reset_manager_base->ctrl);
|
|
/*
|
|
* infinite loop here as watchdog will trigger and reset
|
|
* the processor
|
|
*/
|
|
while (1)
|
|
;
|
|
}
|