mirror of
https://github.com/brain-hackers/u-boot-brain
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67ece26d8b
arm64: - Support for bigger U-Boot images compiled with PIE microblaze: - Extend support for LE/BE systems zynqmp: - Refactor silicon ID detection code with using firmware interface - Add support for saving variables based on bootmode zynqmp-r5: - Fix MPU mapping and defconfig setting. xilinx: - Minor driver changes: names alignment - Enable UBIFS - Minor DT and macros fixes - Fix boot with appended DT - Fix distro boot cmd: - pxe: Add fixing for platforms with manual relocation support clk: - fixed_rate: Add DM flag to support early boot on r5 fpga: - zynqmppl: Use only firmware interface and enable SPL build serial: - uartlite: Enable for ARM systems and support endians mmc: - zynq: Fix indentation net: - gem: Support for multiple phys - emac: Fix 64bit support and enable it for arm64 kconfig: - Setup default values for Xilinx platforms - Fix dependecies for Xilinx drivers - Source board Kconfig only when platform is enabled - Fix FPGA Kconfig entry with SPL - Change some defconfig values bindings: - Add binding doc for vsc8531 -----BEGIN PGP SIGNATURE----- iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCX2x4MgAKCRDKSWXLKUoM IZQtAJ9HpNwG5q3nHt9WedzLCTkr3YoLAACeJJ0Wlpp5p5xPzuPmnoo/Vi4MtNQ= =yxRo -----END PGP SIGNATURE----- Merge tag 'xilinx-for-v2021.01' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2021.01 arm64: - Support for bigger U-Boot images compiled with PIE microblaze: - Extend support for LE/BE systems zynqmp: - Refactor silicon ID detection code with using firmware interface - Add support for saving variables based on bootmode zynqmp-r5: - Fix MPU mapping and defconfig setting. xilinx: - Minor driver changes: names alignment - Enable UBIFS - Minor DT and macros fixes - Fix boot with appended DT - Fix distro boot cmd: - pxe: Add fixing for platforms with manual relocation support clk: - fixed_rate: Add DM flag to support early boot on r5 fpga: - zynqmppl: Use only firmware interface and enable SPL build serial: - uartlite: Enable for ARM systems and support endians mmc: - zynq: Fix indentation net: - gem: Support for multiple phys - emac: Fix 64bit support and enable it for arm64 kconfig: - Setup default values for Xilinx platforms - Fix dependecies for Xilinx drivers - Source board Kconfig only when platform is enabled - Fix FPGA Kconfig entry with SPL - Change some defconfig values bindings: - Add binding doc for vsc8531 |
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| .. | ||
| altera | ||
| analogbits | ||
| aspeed | ||
| at91 | ||
| exynos | ||
| imx | ||
| intel | ||
| kendryte | ||
| mediatek | ||
| meson | ||
| mtmips | ||
| mvebu | ||
| owl | ||
| renesas | ||
| rockchip | ||
| sifive | ||
| sunxi | ||
| tegra | ||
| uniphier | ||
| clk_bcm6345.c | ||
| clk_boston.c | ||
| clk_fixed_factor.c | ||
| clk_fixed_rate.c | ||
| clk_octeon.c | ||
| clk_pic32.c | ||
| clk_sandbox_ccf.c | ||
| clk_sandbox_test.c | ||
| clk_sandbox.c | ||
| clk_stm32f.c | ||
| clk_stm32h7.c | ||
| clk_stm32mp1.c | ||
| clk_versal.c | ||
| clk_vexpress_osc.c | ||
| clk_zynq.c | ||
| clk_zynqmp.c | ||
| clk-cdce9xx.c | ||
| clk-composite.c | ||
| clk-divider.c | ||
| clk-fixed-factor.c | ||
| clk-gate.c | ||
| clk-hsdk-cgu.c | ||
| clk-mux.c | ||
| clk-ti-sci.c | ||
| clk-uclass.c | ||
| clk.c | ||
| ics8n3qv01.c | ||
| Kconfig | ||
| Makefile | ||
| mpc83xx_clk.c | ||
| mpc83xx_clk.h | ||