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https://github.com/brain-hackers/u-boot-brain
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d4ea649f17
In RISC-V, M-mode software can reserve physical memory regions by setting appropriate physical memory protection (PMP) csr. As the PMP csr are accessible only in M-mode, S-mode U-Boot can not read this configuration directly. However, M-mode software can pass this information via reserved-memory node in device tree so that S-mode software can access this information. This patch provides a framework to copy to the reserved-memory node from one DT to another. This will be used to update the DT used by U-Boot and the DT passed to the next stage OS. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
41 lines
948 B
C
41 lines
948 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* Copyright (c) 2017 Microsemi Corporation.
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* Padmarao Begari, Microsemi Corporation <padmarao.begari@microsemi.com>
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*/
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#ifndef __ASM_GBL_DATA_H
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#define __ASM_GBL_DATA_H
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#include <asm/smp.h>
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/* Architecture-specific global data */
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struct arch_global_data {
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long boot_hart; /* boot hart id */
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phys_addr_t firmware_fdt_addr;
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#ifdef CONFIG_SIFIVE_CLINT
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void __iomem *clint; /* clint base address */
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#endif
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#ifdef CONFIG_ANDES_PLIC
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void __iomem *plic; /* plic base address */
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#endif
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#ifdef CONFIG_ANDES_PLMT
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void __iomem *plmt; /* plmt base address */
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#endif
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#if CONFIG_IS_ENABLED(SMP)
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struct ipi_data ipi[CONFIG_NR_CPUS];
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#endif
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#ifndef CONFIG_XIP
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ulong available_harts;
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#endif
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};
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#include <asm-generic/global_data.h>
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#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("gp")
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#endif /* __ASM_GBL_DATA_H */
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