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https://github.com/brain-hackers/u-boot-brain
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![Tom Rini](/assets/img/avatar_default.png)
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
174 lines
3.9 KiB
C
174 lines
3.9 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2014 Freescale Semiconductor, Inc.
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*/
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#include <common.h>
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#include <errno.h>
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#include <power/pmic.h>
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#include <power/pfuze100_pmic.h>
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#ifndef CONFIG_DM_PMIC_PFUZE100
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int pfuze_mode_init(struct pmic *p, u32 mode)
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{
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unsigned char offset, i, switch_num;
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u32 id;
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int ret;
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pmic_reg_read(p, PFUZE100_DEVICEID, &id);
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id = id & 0xf;
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if (id == 0) {
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switch_num = 6;
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offset = PFUZE100_SW1CMODE;
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} else if (id == 1) {
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switch_num = 4;
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offset = PFUZE100_SW2MODE;
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} else {
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printf("Not supported, id=%d\n", id);
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return -EINVAL;
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}
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ret = pmic_reg_write(p, PFUZE100_SW1ABMODE, mode);
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if (ret < 0) {
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printf("Set SW1AB mode error!\n");
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return ret;
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}
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for (i = 0; i < switch_num - 1; i++) {
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ret = pmic_reg_write(p, offset + i * SWITCH_SIZE, mode);
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if (ret < 0) {
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printf("Set switch 0x%x mode error!\n",
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offset + i * SWITCH_SIZE);
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return ret;
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}
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}
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return ret;
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}
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struct pmic *pfuze_common_init(unsigned char i2cbus)
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{
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struct pmic *p;
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int ret;
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unsigned int reg;
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ret = power_pfuze100_init(i2cbus);
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if (ret)
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return NULL;
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p = pmic_get("PFUZE100");
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ret = pmic_probe(p);
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if (ret)
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return NULL;
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pmic_reg_read(p, PFUZE100_DEVICEID, ®);
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printf("PMIC: PFUZE100 ID=0x%02x\n", reg);
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/* Set SW1AB stanby volage to 0.975V */
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pmic_reg_read(p, PFUZE100_SW1ABSTBY, ®);
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reg &= ~SW1x_STBY_MASK;
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reg |= SW1x_0_975V;
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pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg);
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/* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
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pmic_reg_read(p, PFUZE100_SW1ABCONF, ®);
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reg &= ~SW1xCONF_DVSSPEED_MASK;
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reg |= SW1xCONF_DVSSPEED_4US;
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pmic_reg_write(p, PFUZE100_SW1ABCONF, reg);
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/* Set SW1C standby voltage to 0.975V */
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pmic_reg_read(p, PFUZE100_SW1CSTBY, ®);
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reg &= ~SW1x_STBY_MASK;
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reg |= SW1x_0_975V;
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pmic_reg_write(p, PFUZE100_SW1CSTBY, reg);
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/* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */
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pmic_reg_read(p, PFUZE100_SW1CCONF, ®);
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reg &= ~SW1xCONF_DVSSPEED_MASK;
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reg |= SW1xCONF_DVSSPEED_4US;
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pmic_reg_write(p, PFUZE100_SW1CCONF, reg);
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return p;
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}
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#else
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int pfuze_mode_init(struct udevice *dev, u32 mode)
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{
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unsigned char offset, i, switch_num;
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u32 id;
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int ret;
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id = pmic_reg_read(dev, PFUZE100_DEVICEID);
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id = id & 0xf;
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if (id == 0) {
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switch_num = 6;
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offset = PFUZE100_SW1CMODE;
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} else if (id == 1) {
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switch_num = 4;
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offset = PFUZE100_SW2MODE;
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} else {
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printf("Not supported, id=%d\n", id);
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return -EINVAL;
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}
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ret = pmic_reg_write(dev, PFUZE100_SW1ABMODE, mode);
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if (ret < 0) {
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printf("Set SW1AB mode error!\n");
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return ret;
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}
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for (i = 0; i < switch_num - 1; i++) {
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ret = pmic_reg_write(dev, offset + i * SWITCH_SIZE, mode);
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if (ret < 0) {
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printf("Set switch 0x%x mode error!\n",
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offset + i * SWITCH_SIZE);
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return ret;
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}
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}
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return ret;
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}
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struct udevice *pfuze_common_init(void)
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{
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struct udevice *dev;
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int ret;
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unsigned int reg, dev_id, rev_id;
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ret = pmic_get("pfuze100", &dev);
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if (ret == -ENODEV)
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return NULL;
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dev_id = pmic_reg_read(dev, PFUZE100_DEVICEID);
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rev_id = pmic_reg_read(dev, PFUZE100_REVID);
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printf("PMIC: PFUZE100! DEV_ID=0x%x REV_ID=0x%x\n", dev_id, rev_id);
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/* Set SW1AB stanby volage to 0.975V */
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reg = pmic_reg_read(dev, PFUZE100_SW1ABSTBY);
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reg &= ~SW1x_STBY_MASK;
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reg |= SW1x_0_975V;
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pmic_reg_write(dev, PFUZE100_SW1ABSTBY, reg);
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/* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
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reg = pmic_reg_read(dev, PFUZE100_SW1ABCONF);
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reg &= ~SW1xCONF_DVSSPEED_MASK;
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reg |= SW1xCONF_DVSSPEED_4US;
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pmic_reg_write(dev, PFUZE100_SW1ABCONF, reg);
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/* Set SW1C standby voltage to 0.975V */
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reg = pmic_reg_read(dev, PFUZE100_SW1CSTBY);
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reg &= ~SW1x_STBY_MASK;
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reg |= SW1x_0_975V;
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pmic_reg_write(dev, PFUZE100_SW1CSTBY, reg);
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/* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */
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reg = pmic_reg_read(dev, PFUZE100_SW1CCONF);
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reg &= ~SW1xCONF_DVSSPEED_MASK;
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reg |= SW1xCONF_DVSSPEED_4US;
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pmic_reg_write(dev, PFUZE100_SW1CCONF, reg);
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return dev;
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}
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#endif
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