Poonam Aggrwal d3bee08332 85xx/p1_p2_rdb: Modify the CLK_CTRL value for DDR at 667MHz ... Use a slighly larger value of CLK_CTRL for DDR at 667MHz which fixes random crashes while linux booting. Applicable for both NAND and NOR boot. Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>		2010-06-29 21:01:07 +02:00
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config.mk	Create CPUDIR variable	2010-04-13 09:12:59 +02:00
ddr.c	85xx/p1_p2_rdb: Modify the CLK_CTRL value for DDR at 667MHz	2010-06-29 21:01:07 +02:00
law.c	ppc/85xx: Clean up use of LAWAR defines	2009-09-24 12:04:58 -05:00
Makefile	85xx: Added PCIe support for P1 P2 RDB	2009-08-28 17:12:46 -05:00
p1_p2_rdb.c	ppc/85xx: Fixup PCI nodes for P1_P2_RDB	2010-04-26 22:37:50 -05:00
pci.c	PCIe, USB: Replace 'end point' references with 'endpoint'	2010-01-17 23:06:44 +01:00
tlb.c	ppc/85xx: Map boot page guarded for MP boot	2010-01-05 13:49:09 -06:00