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https://github.com/brain-hackers/u-boot-brain
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![wdenk](/assets/img/avatar_default.png)
- remove trailing white space, trailing empty lines, C++ comments, etc. - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c) * Patches by Kenneth Johansson, 25 Jun 2003: - major rework of command structure (work done mostly by Michal Cendrowski and Joakim Kristiansen)
267 lines
6.0 KiB
C
267 lines
6.0 KiB
C
/*
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* (C) Copyright 2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <command.h>
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#include <asm/inca-ip.h>
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#include <asm/regdef.h>
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#include <asm/mipsregs.h>
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#include <asm/addrspace.h>
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#include <asm/cacheops.h>
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#include "sconsole.h"
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#define cache_unroll(base,op) \
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__asm__ __volatile__(" \
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.set noreorder; \
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.set mips3; \
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cache %1, (%0); \
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.set mips0; \
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.set reorder" \
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: \
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: "r" (base), \
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"i" (op));
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typedef void (*FUNCPTR)(ulong *source, ulong *destination, ulong nlongs);
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extern void asc_serial_init (void);
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extern void asc_serial_putc (char);
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extern void asc_serial_puts (const char *);
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extern int asc_serial_getc (void);
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extern int asc_serial_tstc (void);
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extern void asc_serial_setbrg (void);
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static void sdram_timing_init (ulong size)
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{
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register uint pass;
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register uint done;
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register uint count;
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register uint p0, p1, p2, p3, p4;
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register uint addr;
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#define WRITE_MC_IOGP_1 *(uint *)0xbf800800 = (p1<<14)+(p2<<13)+(p4<<8)+(p0<<4)+p3;
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#define WRITE_MC_IOGP_2 *(uint *)0xbf800800 = (p1<<14)+(p2<<13)+((p4-16)<<8)+(p0<<4)+p3;
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done = 0;
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p0 = 2;
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while (p0 < 4 && done == 0) {
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p1 = 0;
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while (p1 < 2 && done == 0) {
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p2 = 0;
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while (p2 < 2 && done == 0) {
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p3 = 0;
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while (p3 < 16 && done == 0) {
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count = 0;
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p4 = 0;
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while (p4 < 32 && done == 0) {
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WRITE_MC_IOGP_1;
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for (addr = KSEG1 + 0x4000;
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addr < KSEG1ADDR (size);
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addr = addr + 4) {
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*(uint *) addr = 0xaa55aa55;
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}
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pass = 1;
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for (addr = KSEG1 + 0x4000;
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addr < KSEG1ADDR (size) && pass == 1;
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addr = addr + 4) {
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if (*(uint *) addr != 0xaa55aa55)
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pass = 0;
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}
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if (pass == 1) {
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count++;
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} else {
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count = 0;
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}
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if (count == 32) {
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WRITE_MC_IOGP_2;
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done = 1;
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}
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p4++;
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}
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p3++;
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}
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p2++;
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}
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p1++;
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}
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p0++;
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if (p0 == 1)
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p0++;
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}
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}
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long int initdram(int board_type)
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{
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/* The only supported number of SDRAM banks is 4.
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*/
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#define CFG_NB 4
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ulong cfgpb0 = *INCA_IP_SDRAM_MC_CFGPB0;
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ulong cfgdw = *INCA_IP_SDRAM_MC_CFGDW;
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int cols = cfgpb0 & 0xF;
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int rows = (cfgpb0 & 0xF0) >> 4;
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int dw = cfgdw & 0xF;
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ulong size = (1 << (rows + cols)) * (1 << (dw - 1)) * CFG_NB;
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void (* sdram_init) (ulong);
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sdram_init = (void (*)(ulong)) KSEG0ADDR(&sdram_timing_init);
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sdram_init(0x10000);
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return size;
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}
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int checkboard (void)
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{
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unsigned long chipid = *(unsigned long *)0xB800C800;
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printf ("Board: Purple PLB 2800 chip version %ld, ", chipid & 0xF);
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printf("CPU Speed %d MHz\n", CPU_CLOCK_RATE/1000000);
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return 0;
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}
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int misc_init_r (void)
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{
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asc_serial_init ();
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sconsole_putc = asc_serial_putc;
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sconsole_puts = asc_serial_puts;
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sconsole_getc = asc_serial_getc;
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sconsole_tstc = asc_serial_tstc;
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sconsole_setbrg = asc_serial_setbrg;
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sconsole_flush ();
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return (0);
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}
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/*******************************************************************************
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*
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* copydwords - copy one buffer to another a long at a time
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*
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* This routine copies the first <nlongs> longs from <source> to <destination>.
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*/
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static void copydwords (ulong *source, ulong *destination, ulong nlongs)
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{
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ulong temp,temp1;
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ulong *dstend = destination + nlongs;
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while (destination < dstend)
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{
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temp = *source++;
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/* dummy read from sdram */
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temp1 = *(ulong *)0xa0000000;
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/* avoid optimization from compliler */
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*(ulong *)0xbf0081f8 = temp1 + temp;
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*destination++ = temp;
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}
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}
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/*******************************************************************************
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*
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* copyLongs - copy one buffer to another a long at a time
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*
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* This routine copies the first <nlongs> longs from <source> to <destination>.
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*/
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static void copyLongs (ulong *source, ulong *destination, ulong nlongs)
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{
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FUNCPTR absEntry;
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absEntry = (FUNCPTR)(0xbf008000+((ulong)copydwords & 0x7));
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absEntry(source, destination, nlongs);
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}
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/*******************************************************************************
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*
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* programLoad - load program into ram
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*
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* This routine load copydwords into ram
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*
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*/
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static void programLoad(void)
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{
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FUNCPTR absEntry;
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ulong *src,*dst;
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src = (ulong *)(TEXT_BASE + 0x428);
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dst = (ulong *)0xbf0081d0;
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absEntry = (FUNCPTR)(TEXT_BASE + 0x400);
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absEntry(src,dst,0x6);
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src = (ulong *)((ulong)copydwords & 0xfffffff8);
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dst = (ulong *)0xbf008000;
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absEntry(src,dst,0x38);
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}
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/*******************************************************************************
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*
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* copy_code - copy u-boot image from flash to RAM
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*
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* This routine is needed to solve flash problems on this board
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*
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*/
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void copy_code (ulong dest_addr)
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{
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extern long uboot_end_data;
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unsigned long start;
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unsigned long end;
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/* load copydwords into ram
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*/
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programLoad();
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/* copy u-boot code
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*/
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copyLongs((ulong *)CFG_MONITOR_BASE,
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(ulong *)dest_addr,
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((ulong)&uboot_end_data - CFG_MONITOR_BASE + 3) / 4);
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/* flush caches
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*/
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start = KSEG0;
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end = start + CFG_DCACHE_SIZE;
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while(start < end) {
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cache_unroll(start,Index_Writeback_Inv_D);
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start += CFG_CACHELINE_SIZE;
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}
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start = KSEG0;
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end = start + CFG_ICACHE_SIZE;
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while(start < end) {
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cache_unroll(start,Index_Invalidate_I);
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start += CFG_CACHELINE_SIZE;
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}
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}
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