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![Benoît Thébaudeau](/assets/img/avatar_default.png)
The i.MX5 eSDHC clocks were considered as coming from the IPG clock although they have dedicated clock paths. Also, on i.MX5/6, each SDHC instance has a dedicated clock, so gd->sdhc_clk must be set accordingly. This is good for the case only a single SDHC instance is used (initialization made with fsl_esdhc_mmc_init()). A future patch will fix the multi-instance use case (initialization made directly with fsl_esdhc_initialize()). Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Bénard <eric@eukrea.com> Cc: Otavio Salvador <otavio@ossystems.com.br>
62 lines
1.9 KiB
C
62 lines
1.9 KiB
C
/*
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* (C) Copyright 2000-2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
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* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/clock.h>
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#ifdef CONFIG_FSL_ESDHC
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DECLARE_GLOBAL_DATA_PTR;
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#endif
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int get_clocks(void)
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{
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#ifdef CONFIG_FSL_ESDHC
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#ifdef CONFIG_FSL_USDHC
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#if CONFIG_SYS_FSL_ESDHC_ADDR == USDHC2_BASE_ADDR
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gd->sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
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#elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC3_BASE_ADDR
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gd->sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
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#elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC4_BASE_ADDR
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gd->sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
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#else
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gd->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
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#endif
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#else
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#if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR
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gd->sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
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#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR
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gd->sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
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#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC4_BASE_ADDR
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gd->sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
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#else
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gd->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
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#endif
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#endif
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#endif
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return 0;
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}
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