u-boot-brain/arch/arm/cpu/armv8/fsl-lsch3
Bhupesh Sharma d27bf906da armv8/fsl-ch3: Add support to print RCW configuration
This patch adds support to print out the Reset Configuration Word
information.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
2015-04-23 08:55:57 -07:00
..
cpu.c armv8/fsl-ch3: Add support to print RCW configuration 2015-04-23 08:55:57 -07:00
cpu.h armv8/fsl-lsch3: Release secondary cores from boot hold off with Boot Page 2014-09-25 08:36:19 -07:00
fdt.c armv8/fsl-lsch3: Use correct compatible for serial clock fixup 2015-04-23 08:55:56 -07:00
fsl_lsch3_serdes.c armv8: Add SerDes framework for Layerscape Architecture 2015-04-23 08:55:57 -07:00
lowlevel.S armv8/fsl-lsch3: Set nodes in DVM domain 2015-04-23 08:55:55 -07:00
ls2085a_serdes.c armv8: Add SerDes framework for Layerscape Architecture 2015-04-23 08:55:57 -07:00
Makefile armv8: Add SerDes framework for Layerscape Architecture 2015-04-23 08:55:57 -07:00
mp.c armv8/ls2085a: Fix generic timer clock source 2015-04-23 08:55:55 -07:00
mp.h armv8/ls2085a: Fix generic timer clock source 2015-04-23 08:55:55 -07:00
README drivers/fsl-mc: Changed MC firmware loading for new boot architecture 2015-04-23 08:55:57 -07:00
soc.c armv8/ls2085a: Add workaround for USB erratum A-008751 2015-04-23 08:55:56 -07:00
speed.c armv8/fsl-lsch3: Fix platform clock calculation 2015-04-23 08:55:55 -07:00
speed.h ARMv8/FSL_LSCH3: Add FSL_LSCH3 SoC 2014-07-03 08:40:51 +02:00

#
# Copyright 2014 Freescale Semiconductor
#
# SPDX-License-Identifier:      GPL-2.0+
#

Freescale LayerScape with Chassis Generation 3

This architecture supports Freescale ARMv8 SoCs with Chassis generation 3,
for example LS2085A.

Flash Layout
============
A typical layout of various images (including Linux and other firmware images)
is shown below considering a 32MB NOR flash device:

	-------------------------
	|	linux		|
	------------------------- ----> 0x0120_0000
	|	Debug Server 	|
	------------------------- ----> 0x00C0_0000
	|	AIOP SW 	|
	------------------------- ----> 0x0070_0000
	|	MC FW 		|
	------------------------- ----> 0x006C_0000
	| MC Data Path Layout 	|
	------------------------- ----> 0x0020_0000
	|	BootLoader 	|
	------------------------- ----> 0x0000_1000
	|	PBI 		|
	------------------------- ----> 0x0000_0080
	|	RCW 		|
	------------------------- ----> 0x0000_0000

	32-MB NOR flash layout

Environment Variables
=====================
mcboottimeout:	MC boot timeout in milliseconds. If this variable is not defined
		the value CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS will be assumed.

mcmemsize:	MC DRAM block size. If this variable is not defined, the value
		CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE will be assumed.