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![J. German Rivera](/assets/img/avatar_default.png)
Upgrade Manage Complex (MC) flib API to 0.5.2. Rename directory fsl_mc to fsl-mc. Change the fsl-mc node in Linux device tree from "fsl,dprcr" to "fsl-mc". Print MC version info when appropriate. Signed-off-by: J. German Rivera <German.Rivera@freescale.com> Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
311 lines
8.4 KiB
C
311 lines
8.4 KiB
C
/*
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* Copyright (C) 2014 Freescale Semiconductor
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <errno.h>
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#include <asm/io.h>
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#include <fsl-mc/fsl_mc.h>
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#include <fsl-mc/fsl_mc_sys.h>
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#include <fsl-mc/fsl_dpmng.h>
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DECLARE_GLOBAL_DATA_PTR;
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static int mc_boot_status;
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/**
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* Copying MC firmware or DPL image to DDR
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*/
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static int mc_copy_image(const char *title,
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u64 image_addr, u32 image_size, u64 mc_ram_addr)
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{
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debug("%s copied to address %p\n", title, (void *)mc_ram_addr);
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memcpy((void *)mc_ram_addr, (void *)image_addr, image_size);
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return 0;
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}
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/**
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* MC firmware FIT image parser checks if the image is in FIT
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* format, verifies integrity of the image and calculates
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* raw image address and size values.
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* Returns 0 on success and a negative errno on error.
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* task fail.
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**/
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int parse_mc_firmware_fit_image(const void **raw_image_addr,
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size_t *raw_image_size)
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{
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int format;
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void *fit_hdr;
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int node_offset;
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const void *data;
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size_t size;
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const char *uname = "firmware";
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/* Check if the image is in NOR flash */
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#ifdef CONFIG_SYS_LS_MC_FW_IN_NOR
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fit_hdr = (void *)CONFIG_SYS_LS_MC_FW_ADDR;
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#else
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#error "No CONFIG_SYS_LS_MC_FW_IN_xxx defined"
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#endif
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/* Check if Image is in FIT format */
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format = genimg_get_format(fit_hdr);
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if (format != IMAGE_FORMAT_FIT) {
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printf("fsl-mc: ERROR: Bad firmware image (not a FIT image)\n");
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return -EINVAL;
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}
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if (!fit_check_format(fit_hdr)) {
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printf("fsl-mc: ERROR: Bad firmware image (bad FIT header)\n");
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return -EINVAL;
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}
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node_offset = fit_image_get_node(fit_hdr, uname);
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if (node_offset < 0) {
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printf("fsl-mc: ERROR: Bad firmware image (missing subimage)\n");
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return -ENOENT;
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}
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/* Verify MC firmware image */
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if (!(fit_image_verify(fit_hdr, node_offset))) {
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printf("fsl-mc: ERROR: Bad firmware image (bad CRC)\n");
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return -EINVAL;
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}
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/* Get address and size of raw image */
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fit_image_get_data(fit_hdr, node_offset, &data, &size);
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*raw_image_addr = data;
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*raw_image_size = size;
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return 0;
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}
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int mc_init(bd_t *bis)
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{
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int error = 0;
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int timeout = 200000;
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struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
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u64 mc_ram_addr;
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u64 mc_dpl_offset;
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u32 reg_gsr;
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u32 mc_fw_boot_status;
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void *dpl_fdt_hdr;
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int dpl_size;
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const void *raw_image_addr;
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size_t raw_image_size = 0;
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struct fsl_mc_io mc_io;
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int portal_id;
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struct mc_version mc_ver_info;
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/*
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* The MC private DRAM block was already carved at the end of DRAM
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* by board_init_f() using CONFIG_SYS_MEM_TOP_HIDE:
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*/
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if (gd->bd->bi_dram[1].start) {
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mc_ram_addr =
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gd->bd->bi_dram[1].start + gd->bd->bi_dram[1].size;
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} else {
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mc_ram_addr =
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gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size;
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}
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/*
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* Management Complex cores should be held at reset out of POR.
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* U-boot should be the first software to touch MC. To be safe,
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* we reset all cores again by setting GCR1 to 0. It doesn't do
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* anything if they are held at reset. After we setup the firmware
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* we kick off MC by deasserting the reset bit for core 0, and
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* deasserting the reset bits for Command Portal Managers.
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* The stop bits are not touched here. They are used to stop the
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* cores when they are active. Setting stop bits doesn't stop the
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* cores from fetching instructions when they are released from
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* reset.
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*/
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out_le32(&mc_ccsr_regs->reg_gcr1, 0);
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dmb();
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error = parse_mc_firmware_fit_image(&raw_image_addr, &raw_image_size);
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if (error != 0)
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goto out;
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/*
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* Load the MC FW at the beginning of the MC private DRAM block:
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*/
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mc_copy_image("MC Firmware",
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(u64)raw_image_addr, raw_image_size, mc_ram_addr);
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/*
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* Get address and size of the DPL blob stored in flash:
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*/
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#ifdef CONFIG_SYS_LS_MC_DPL_IN_NOR
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dpl_fdt_hdr = (void *)CONFIG_SYS_LS_MC_DPL_ADDR;
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#else
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#error "No CONFIG_SYS_LS_MC_DPL_IN_xxx defined"
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#endif
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error = fdt_check_header(dpl_fdt_hdr);
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if (error != 0) {
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printf("fsl-mc: ERROR: Bad DPL image (bad header)\n");
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goto out;
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}
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dpl_size = fdt_totalsize(dpl_fdt_hdr);
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if (dpl_size > CONFIG_SYS_LS_MC_DPL_MAX_LENGTH) {
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printf("fsl-mc: ERROR: Bad DPL image (too large: %d)\n",
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dpl_size);
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error = -EINVAL;
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goto out;
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}
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/*
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* Calculate offset in the MC private DRAM block at which the MC DPL
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* blob is to be placed:
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*/
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#ifdef CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET
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BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET & 0x3) != 0 ||
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CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET > 0xffffffff);
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mc_dpl_offset = CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET;
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#else
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mc_dpl_offset = mc_get_dram_block_size() -
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roundup(CONFIG_SYS_LS_MC_DPL_MAX_LENGTH, 4096);
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if ((mc_dpl_offset & 0x3) != 0 || mc_dpl_offset > 0xffffffff) {
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printf("%s: Invalid MC DPL offset: %llu\n",
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__func__, mc_dpl_offset);
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error = -EINVAL;
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goto out;
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}
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#endif
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/*
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* Load the MC DPL blob at the far end of the MC private DRAM block:
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*
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* TODO: Should we place the DPL at a different location to match
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* assumptions of MC firmware about its memory layout?
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*/
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mc_copy_image("MC DPL blob",
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(u64)dpl_fdt_hdr, dpl_size, mc_ram_addr + mc_dpl_offset);
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debug("mc_ccsr_regs %p\n", mc_ccsr_regs);
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/*
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* Tell MC where the MC Firmware image was loaded in DDR:
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*/
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out_le32(&mc_ccsr_regs->reg_mcfbalr, (u32)mc_ram_addr);
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out_le32(&mc_ccsr_regs->reg_mcfbahr, (u32)((u64)mc_ram_addr >> 32));
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out_le32(&mc_ccsr_regs->reg_mcfapr, MCFAPR_BYPASS_ICID_MASK);
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/*
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* Tell MC where the DPL blob was loaded in DDR, by indicating
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* its offset relative to the beginning of the DDR block
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* allocated to the MC firmware. The MC firmware is responsible
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* for checking that there is no overlap between the DPL blob
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* and the runtime heap and stack of the MC firmware itself.
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*
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* NOTE: bits [31:2] of this offset need to be stored in bits [29:0] of
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* the GSR MC CCSR register. So, this offset is assumed to be 4-byte
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* aligned.
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* Care must be taken not to write 1s into bits 31 and 30 of the GSR in
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* this case as the SoC COP or PIC will be signaled.
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*/
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out_le32(&mc_ccsr_regs->reg_gsr, (u32)(mc_dpl_offset >> 2));
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printf("\nfsl-mc: Booting Management Complex ...\n");
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/*
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* Deassert reset and release MC core 0 to run
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*/
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out_le32(&mc_ccsr_regs->reg_gcr1, GCR1_P1_DE_RST | GCR1_M_ALL_DE_RST);
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dmb();
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debug("Polling mc_ccsr_regs->reg_gsr ...\n");
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for (;;) {
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reg_gsr = in_le32(&mc_ccsr_regs->reg_gsr);
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mc_fw_boot_status = (reg_gsr & GSR_FS_MASK);
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if (mc_fw_boot_status & 0x1)
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break;
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udelay(1000); /* throttle polling */
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if (timeout-- <= 0)
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break;
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}
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if (timeout <= 0) {
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printf("fsl-mc: timeout booting management complex firmware\n");
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/* TODO: Get an error status from an MC CCSR register */
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error = -ETIMEDOUT;
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goto out;
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}
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if (mc_fw_boot_status != 0x1) {
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/*
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* TODO: Identify critical errors from the GSR register's FS
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* field and for those errors, set error to -ENODEV or other
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* appropriate errno, so that the status property is set to
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* failure in the fsl,dprc device tree node.
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*/
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printf("fsl-mc: WARNING: Firmware booted with error (GSR: %#x)\n",
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reg_gsr);
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}
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/*
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* TODO: need to obtain the portal_id for the root container from the
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* DPL
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*/
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portal_id = 0;
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/*
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* Check that the MC firmware is responding portal commands:
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*/
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mc_io.mmio_regs = SOC_MC_PORTAL_ADDR(portal_id);
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debug("Checking access to MC portal of root DPRC container (portal_id %d, portal physical addr %p)\n",
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portal_id, mc_io.mmio_regs);
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error = mc_get_version(&mc_io, &mc_ver_info);
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if (error != 0) {
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printf("fsl-mc: ERROR: Firmware version check failed (error: %d)\n",
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error);
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goto out;
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}
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if (MC_VER_MAJOR != mc_ver_info.major)
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printf("fsl-mc: ERROR: Firmware major version mismatch (found: %d, expected: %d)\n",
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mc_ver_info.major, MC_VER_MAJOR);
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if (MC_VER_MINOR != mc_ver_info.minor)
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printf("fsl-mc: WARNING: Firmware minor version mismatch (found: %d, expected: %d)\n",
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mc_ver_info.minor, MC_VER_MINOR);
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printf("fsl-mc: Management Complex booted (version: %d.%d.%d, boot status: %#x)\n",
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mc_ver_info.major, mc_ver_info.minor, mc_ver_info.revision,
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mc_fw_boot_status);
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out:
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if (error != 0)
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mc_boot_status = -error;
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else
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mc_boot_status = 0;
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return error;
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}
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int get_mc_boot_status(void)
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{
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return mc_boot_status;
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}
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/**
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* Return the actual size of the MC private DRAM block.
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*
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* NOTE: For now this function always returns the minimum required size,
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* However, in the future, the actual size may be obtained from an environment
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* variable.
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*/
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unsigned long mc_get_dram_block_size(void)
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{
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return CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
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}
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