mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-12 14:16:17 +09:00
d1a5286099
Previously, only host1 was supported using an index of 0. Now, otg has index 0, host1 is 1, host2 is 2, host3 is 3. Since OTG requires usbmode to be set after reset, I added CONFIG_EHCI_HCD_INIT_AFTER_RESET to nitrogen6x.h and mx6qsabreauto.h. I also added a weak function board_ehci_power to handle turning power on/off for otg. Type is type of device connected (USB stick vs Host.) Init is type of device desired. Only power up port if type == init == USB_INIT_HOST. Only return error if type != init. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
45 lines
1.2 KiB
C
45 lines
1.2 KiB
C
/*
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* Copyright (C) 2012 Freescale Semiconductor, Inc.
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*
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* Configuration settings for the Freescale i.MX6Q SabreAuto board.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __MX6QSABREAUTO_CONFIG_H
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#define __MX6QSABREAUTO_CONFIG_H
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#define CONFIG_MACH_TYPE 3529
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#define CONFIG_MXC_UART_BASE UART4_BASE
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#define CONFIG_CONSOLE_DEV "ttymxc3"
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#define CONFIG_DEFAULT_FDT_FILE "imx6q-sabreauto.dtb"
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#define CONFIG_MMCROOT "/dev/mmcblk0p2"
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#define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024)
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/* USB Configs */
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#define CONFIG_CMD_USB
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#define CONFIG_USB_EHCI
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_USB_STORAGE
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#include "mx6sabre_common.h"
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#define CONFIG_SYS_FSL_USDHC_NUM 2
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#if defined(CONFIG_ENV_IS_IN_MMC)
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#endif
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/* I2C Configs */
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#define CONFIG_CMD_I2C
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#define CONFIG_I2C_MULTI_BUS
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#define CONFIG_I2C_MXC
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#define CONFIG_SYS_I2C_SPEED 100000
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#endif /* __MX6QSABREAUTO_CONFIG_H */
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