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https://github.com/brain-hackers/u-boot-brain
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41575d8e4c
This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
110 lines
2.7 KiB
C
110 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2019
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* Alex Marginean, NXP
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*/
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#include <dm.h>
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#include <errno.h>
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#include <log.h>
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#include <miiphy.h>
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#include <i2c.h>
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/*
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* This driver is used for MDIO muxes driven by writing to a register of an I2C
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* chip. The board it was developed for uses a mux controlled by on-board FPGA
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* which in turn is accessed as a chip over I2C.
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*/
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struct mdio_mux_i2creg_priv {
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struct udevice *chip;
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int reg;
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int mask;
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};
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static int mdio_mux_i2creg_select(struct udevice *mux, int cur, int sel)
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{
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struct mdio_mux_i2creg_priv *priv = dev_get_priv(mux);
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u8 val, val_old;
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/* if last selection didn't change we're good to go */
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if (cur == sel)
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return 0;
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val_old = dm_i2c_reg_read(priv->chip, priv->reg);
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val = (val_old & ~priv->mask) | (sel & priv->mask);
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debug("%s: chip %s, reg %x, val %x => %x\n", __func__, priv->chip->name,
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priv->reg, val_old, val);
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dm_i2c_reg_write(priv->chip, priv->reg, val);
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return 0;
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}
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static const struct mdio_mux_ops mdio_mux_i2creg_ops = {
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.select = mdio_mux_i2creg_select,
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};
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static int mdio_mux_i2creg_probe(struct udevice *dev)
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{
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struct mdio_mux_i2creg_priv *priv = dev_get_priv(dev);
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ofnode chip_node, bus_node;
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struct udevice *i2c_bus;
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u32 reg_mask[2];
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u32 chip_addr;
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int err;
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/* read the register addr/mask pair */
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err = dev_read_u32_array(dev, "mux-reg-masks", reg_mask, 2);
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if (err) {
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debug("%s: error reading mux-reg-masks property\n", __func__);
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return err;
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}
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/* parent should be an I2C chip, grandparent should be an I2C bus */
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chip_node = ofnode_get_parent(dev->node);
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bus_node = ofnode_get_parent(chip_node);
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err = uclass_get_device_by_ofnode(UCLASS_I2C, bus_node, &i2c_bus);
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if (err) {
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debug("%s: can't find I2C bus for node %s\n", __func__,
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ofnode_get_name(bus_node));
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return err;
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}
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err = ofnode_read_u32(chip_node, "reg", &chip_addr);
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if (err) {
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debug("%s: can't read chip address in %s\n", __func__,
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ofnode_get_name(chip_node));
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return err;
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}
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err = i2c_get_chip(i2c_bus, (uint)chip_addr, 1, &priv->chip);
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if (err) {
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debug("%s: can't find i2c chip device for addr %x\n", __func__,
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chip_addr);
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return err;
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}
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priv->reg = (int)reg_mask[0];
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priv->mask = (int)reg_mask[1];
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debug("%s: chip %s, reg %x, mask %x\n", __func__, priv->chip->name,
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priv->reg, priv->mask);
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return 0;
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}
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static const struct udevice_id mdio_mux_i2creg_ids[] = {
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{ .compatible = "mdio-mux-i2creg" },
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{ }
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};
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U_BOOT_DRIVER(mdio_mux_i2creg) = {
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.name = "mdio_mux_i2creg",
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.id = UCLASS_MDIO_MUX,
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.of_match = mdio_mux_i2creg_ids,
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.probe = mdio_mux_i2creg_probe,
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.ops = &mdio_mux_i2creg_ops,
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.priv_auto = sizeof(struct mdio_mux_i2creg_priv),
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};
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