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https://github.com/brain-hackers/u-boot-brain
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10473d0490
The physical base address of the NOR flash is 0x1e000000
on the Malta boards. The hardware also maps the first 4MiB
of the flash into the 0x1fc00000-0x1fffffff range.
Currently, U-Boot uses the mapped address to access the
flash, which does not work in recent qemu versions.
Since commit a427338b222b43197c2776cbc996936df0302f51
(mips_malta: correct reading MIPS revision at 0x1fc00010)
writing to the mapped address space causes a CPU exception.
Due to the exception, U-Boot hangs during boot when it tries
to detect the CFI flash chip.
Use the correct physical address for the MALTA_FLASH_BASE
constant to fix the problem. In order to avoid relocation
problems, also update the CONFIG_SYS_{TEXT,MONITOR}_BASE
constants.
The change makes it possible to start U-Boot on a Malta
board emulated with Qemu 1.6.1 and 1.7.0-rc0. It also
works on older versions (tested with 1.1.1, 1.2.2, 1.4.2,
1.5.3).
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Paul Burton <paul.burton@imgtec.com>
125 lines
2.7 KiB
C
125 lines
2.7 KiB
C
/*
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* Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#ifndef _MALTA_CONFIG_H
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#define _MALTA_CONFIG_H
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#include <asm/addrspace.h>
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#include <asm/malta.h>
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/*
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* System configuration
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*/
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#define CONFIG_MALTA
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#define CONFIG_MEMSIZE_IN_BYTES
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#define CONFIG_PCI
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#define CONFIG_PCI_GT64120
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#define CONFIG_PCI_MSC01
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#define CONFIG_PCI_PNP
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#define CONFIG_PCNET
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#define CONFIG_PCNET_79C973
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#define PCNET_HAS_PROM
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#define CONFIG_MISC_INIT_R
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#define CONFIG_RTC_MC146818
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#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
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/*
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* CPU Configuration
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*/
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#define CONFIG_SYS_MHZ 250 /* arbitrary value */
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#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
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#define CONFIG_SWAP_IO_SPACE
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/*
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* Memory map
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*/
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#define CONFIG_SYS_TEXT_BASE 0xbe000000 /* Rom version */
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */
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#define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024)
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#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
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#define CONFIG_SYS_LOAD_ADDR 0x81000000
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#define CONFIG_SYS_MEMTEST_START 0x80100000
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#define CONFIG_SYS_MEMTEST_END 0x80800000
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#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
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#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024)
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/*
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* Console configuration
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*/
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#if defined(CONFIG_SYS_LITTLE_ENDIAN)
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#define CONFIG_SYS_PROMPT "maltael # "
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#else
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#define CONFIG_SYS_PROMPT "malta # "
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#endif
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#define CONFIG_SYS_CBSIZE 256
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_CMDLINE_EDITING
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/*
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* Serial driver
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*/
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE 1
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#define CONFIG_SYS_NS16550_CLK 115200
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#define CONFIG_SYS_NS16550_COM1 CKSEG1ADDR(MALTA_GT_UART0_BASE)
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#define CONFIG_SYS_NS16550_COM2 CKSEG1ADDR(MALTA_MSC01_UART0_BASE)
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#define CONFIG_CONS_INDEX 1
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/*
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* Flash configuration
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*/
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#define CONFIG_SYS_FLASH_BASE (KSEG1 | MALTA_FLASH_BASE)
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_MAX_FLASH_SECT 128
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
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/*
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* Environment
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*/
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#define CONFIG_ENV_IS_IN_FLASH
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#define CONFIG_ENV_SECT_SIZE 0x20000
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#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
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#define CONFIG_ENV_ADDR \
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(CONFIG_SYS_FLASH_BASE + (4 << 20) - CONFIG_ENV_SIZE)
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/*
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* Commands
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*/
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#include <config_cmd_default.h>
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#undef CONFIG_CMD_FPGA
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#undef CONFIG_CMD_LOADB
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#undef CONFIG_CMD_LOADS
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#undef CONFIG_CMD_NFS
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#define CONFIG_CMD_DATE
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_PCI
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#define CONFIG_CMD_PING
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#define CONFIG_SYS_LONGHELP /* verbose help, undef to save memory */
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#endif /* _MALTA_CONFIG_H */
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