mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
fe7d654d04
Migrate the BR/OR settings to Kconfig. These must be known at compile time, so cannot be configured via DT. Configuration of this crucial variable should still be somewhat comfortable. Hence, make its fields configurable in Kconfig, and assemble the final value from these. Signed-off-by: Mario Six <mario.six@gdsys.cc>
178 lines
4.7 KiB
Plaintext
178 lines
4.7 KiB
Plaintext
CONFIG_PPC=y
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CONFIG_SYS_TEXT_BASE=0xF0000000
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CONFIG_SYS_CLK_FREQ=66000000
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CONFIG_MPC83xx=y
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CONFIG_HIGH_BATS=y
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CONFIG_TARGET_TUXX1=y
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CONFIG_CORE_PLL_RATIO_25_1=y
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CONFIG_QUICC_MULT_FACTOR_3=y
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CONFIG_BOOT_MEMORY_SPACE_LOW=y
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CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
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CONFIG_BAT0=y
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CONFIG_BAT0_NAME="SDRAM"
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CONFIG_BAT0_BASE=0x00000000
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CONFIG_BAT0_LENGTH_256_MBYTES=y
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CONFIG_BAT0_ACCESS_RW=y
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CONFIG_BAT0_ICACHE_INHIBITED=y
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CONFIG_BAT0_ICACHE_GUARDED=y
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CONFIG_BAT0_DCACHE_INHIBITED=y
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CONFIG_BAT0_DCACHE_GUARDED=y
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CONFIG_BAT0_USER_MODE_VALID=y
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CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
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CONFIG_BAT1=y
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CONFIG_BAT1_NAME="IMMR"
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CONFIG_BAT1_BASE=0xE0000000
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CONFIG_BAT1_LENGTH_4_MBYTES=y
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CONFIG_BAT1_ACCESS_RW=y
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CONFIG_BAT1_ICACHE_INHIBITED=y
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CONFIG_BAT1_ICACHE_GUARDED=y
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CONFIG_BAT1_DCACHE_INHIBITED=y
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CONFIG_BAT1_DCACHE_GUARDED=y
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CONFIG_BAT1_USER_MODE_VALID=y
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CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
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CONFIG_BAT2=y
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CONFIG_BAT2_NAME="KMBEC_FPGA"
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CONFIG_BAT2_BASE=0xE8000000
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CONFIG_BAT2_LENGTH_128_MBYTES=y
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CONFIG_BAT2_ACCESS_RW=y
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CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
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CONFIG_BAT2_DCACHE_INHIBITED=y
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CONFIG_BAT2_DCACHE_GUARDED=y
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CONFIG_BAT2_USER_MODE_VALID=y
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CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
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CONFIG_BAT3=y
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CONFIG_BAT3_NAME="FLASH"
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CONFIG_BAT3_BASE=0xF0000000
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CONFIG_BAT3_LENGTH_256_MBYTES=y
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CONFIG_BAT3_ACCESS_RW=y
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CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
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CONFIG_BAT3_DCACHE_INHIBITED=y
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CONFIG_BAT3_DCACHE_GUARDED=y
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CONFIG_BAT3_USER_MODE_VALID=y
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CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
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CONFIG_BAT4=y
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CONFIG_BAT4_NAME="STACK_IN_DCACHE"
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CONFIG_BAT4_BASE=0xE6000000
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CONFIG_BAT4_ACCESS_RW=y
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CONFIG_BAT4_USER_MODE_VALID=y
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CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
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CONFIG_BAT5=y
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CONFIG_BAT5_NAME="APP1"
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CONFIG_BAT5_BASE=0xA0000000
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CONFIG_BAT5_LENGTH_256_MBYTES=y
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CONFIG_BAT5_ACCESS_RW=y
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CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y
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CONFIG_BAT5_DCACHE_INHIBITED=y
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CONFIG_BAT5_DCACHE_GUARDED=y
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CONFIG_BAT5_USER_MODE_VALID=y
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CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
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CONFIG_BAT6=y
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CONFIG_BAT6_NAME="APP2"
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CONFIG_BAT6_BASE=0xB0000000
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CONFIG_BAT6_LENGTH_256_MBYTES=y
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CONFIG_BAT6_ACCESS_RW=y
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CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
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CONFIG_BAT6_DCACHE_INHIBITED=y
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CONFIG_BAT6_DCACHE_GUARDED=y
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CONFIG_BAT6_USER_MODE_VALID=y
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CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
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CONFIG_LBLAW0=y
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CONFIG_LBLAW0_BASE=0xF0000000
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CONFIG_LBLAW0_NAME="FLASH"
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CONFIG_LBLAW0_LENGTH_256_MBYTES=y
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CONFIG_LBLAW1=y
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CONFIG_LBLAW1_BASE=0xE8000000
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CONFIG_LBLAW1_NAME="KMBEC_FPGA"
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CONFIG_LBLAW1_LENGTH_128_MBYTES=y
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CONFIG_LBLAW2=y
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CONFIG_LBLAW2_BASE=0xA0000000
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CONFIG_LBLAW2_NAME="APP1"
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CONFIG_LBLAW2_LENGTH_256_MBYTES=y
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CONFIG_LBLAW3=y
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CONFIG_LBLAW3_BASE=0xB0000000
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CONFIG_LBLAW3_NAME="APP2"
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CONFIG_LBLAW3_LENGTH_256_MBYTES=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_MISC_INIT_R=y
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CONFIG_VERSION_VARIABLE=y
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CONFIG_BOARD_EARLY_INIT_R=y
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CONFIG_LAST_STAGE_INIT=y
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CONFIG_HUSH_PARSER=y
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CONFIG_AUTOBOOT_KEYED=y
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CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n"
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CONFIG_AUTOBOOT_STOP_STR=" "
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CONFIG_CMD_IMLS=y
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CONFIG_CMD_ASKENV=y
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CONFIG_CMD_GREPENV=y
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CONFIG_CMD_EEPROM=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_JFFS2=y
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CONFIG_CMD_MTDPARTS=y
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CONFIG_MTDIDS_DEFAULT="nor0=boot"
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CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi0);"
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CONFIG_CMD_UBI=y
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# CONFIG_CMD_UBIFS is not set
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CONFIG_BOOTCOUNT_LIMIT=y
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CONFIG_BOOTCOUNT_BOOTLIMIT=3
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CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8
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# CONFIG_MMC is not set
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_MTD_DEVICE=y
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CONFIG_FLASH_CFI_DRIVER=y
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CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
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CONFIG_FLASH_CFI_MTD=y
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CONFIG_SYS_FLASH_PROTECTION=y
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CONFIG_SYS_FLASH_CFI=y
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# CONFIG_PCI is not set
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CONFIG_SYS_NS16550=y
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CONFIG_OF_LIBFDT=y
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CONFIG_ELBC_BR0_OR0=y
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CONFIG_BR0_OR0_NAME="FLASH"
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CONFIG_BR0_OR0_BASE=0xF0000000
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CONFIG_BR0_MACHINE_GPCM=y
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CONFIG_BR0_PORTSIZE_16BIT=y
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CONFIG_OR0_AM_256_MBYTES=y
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CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
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CONFIG_OR0_CSNT_EARLIER=y
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CONFIG_OR0_EAD_EXTRA=y
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CONFIG_OR0_SCY_5=y
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CONFIG_OR0_TRLX_RELAXED=y
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CONFIG_ELBC_BR1_OR1=y
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CONFIG_BR1_OR1_NAME="KMBEC_FPGA"
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CONFIG_BR1_OR1_BASE=0xE8000000
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CONFIG_BR1_MACHINE_GPCM=y
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CONFIG_BR1_PORTSIZE_8BIT=y
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CONFIG_OR1_AM_128_MBYTES=y
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CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y
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CONFIG_OR1_CSNT_EARLIER=y
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CONFIG_OR1_EAD_EXTRA=y
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CONFIG_OR1_SCY_2=y
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CONFIG_OR1_TRLX_RELAXED=y
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CONFIG_ELBC_BR2_OR2=y
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CONFIG_BR2_OR2_NAME="APP1"
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CONFIG_BR2_OR2_BASE=0xA0000000
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CONFIG_BR2_MACHINE_GPCM=y
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CONFIG_BR2_PORTSIZE_8BIT=y
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CONFIG_OR2_AM_256_MBYTES=y
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CONFIG_OR2_ACS_QUARTER_CYCLE_EARLIER=y
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CONFIG_OR2_CSNT_EARLIER=y
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CONFIG_OR2_EAD_EXTRA=y
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CONFIG_OR2_SCY_2=y
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CONFIG_OR2_TRLX_RELAXED=y
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CONFIG_OR2_EHTR_4_CYCLE=y
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CONFIG_ELBC_BR3_OR3=y
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CONFIG_BR3_OR3_NAME="APP2"
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CONFIG_BR3_OR3_BASE=0xB0000000
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CONFIG_BR3_MACHINE_GPCM=y
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CONFIG_BR3_PORTSIZE_8BIT=y
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CONFIG_OR3_AM_256_MBYTES=y
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CONFIG_OR3_ACS_HALF_CYCLE_EARLIER=y
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CONFIG_OR3_CSNT_EARLIER=y
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CONFIG_OR3_SCY_2=y
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CONFIG_OR3_TRLX_RELAXED=y
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CONFIG_OR3_EHTR_4_CYCLE=y
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