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https://github.com/brain-hackers/u-boot-brain
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![Tom Rini](/assets/img/avatar_default.png)
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
176 lines
4.1 KiB
C
176 lines
4.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2016 Atmel Corporation
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* Wenyou.Yang <wenyou.yang@atmel.com>
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*/
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#include <common.h>
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#include <clk-uclass.h>
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#include <dm.h>
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#include <linux/io.h>
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#include <mach/at91_pmc.h>
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#include "pmc.h"
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DECLARE_GLOBAL_DATA_PTR;
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#define GENERATED_SOURCE_MAX 6
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#define GENERATED_MAX_DIV 255
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/**
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* generated_clk_bind() - for the generated clock driver
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* Recursively bind its children as clk devices.
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*
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* @return: 0 on success, or negative error code on failure
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*/
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static int generated_clk_bind(struct udevice *dev)
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{
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return at91_clk_sub_device_bind(dev, "generic-clk");
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}
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static const struct udevice_id generated_clk_match[] = {
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{ .compatible = "atmel,sama5d2-clk-generated" },
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{}
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};
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U_BOOT_DRIVER(generated_clk) = {
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.name = "generated-clk",
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.id = UCLASS_MISC,
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.of_match = generated_clk_match,
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.bind = generated_clk_bind,
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};
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/*-------------------------------------------------------------*/
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struct generic_clk_priv {
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u32 num_parents;
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};
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static ulong generic_clk_get_rate(struct clk *clk)
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{
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struct pmc_platdata *plat = dev_get_platdata(clk->dev);
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struct at91_pmc *pmc = plat->reg_base;
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struct clk parent;
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ulong clk_rate;
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u32 tmp, gckdiv;
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u8 clock_source, parent_index;
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int ret;
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writel(clk->id & AT91_PMC_PCR_PID_MASK, &pmc->pcr);
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tmp = readl(&pmc->pcr);
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clock_source = (tmp >> AT91_PMC_PCR_GCKCSS_OFFSET) &
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AT91_PMC_PCR_GCKCSS_MASK;
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gckdiv = (tmp >> AT91_PMC_PCR_GCKDIV_OFFSET) & AT91_PMC_PCR_GCKDIV_MASK;
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parent_index = clock_source - 1;
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ret = clk_get_by_index(dev_get_parent(clk->dev), parent_index, &parent);
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if (ret)
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return 0;
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clk_rate = clk_get_rate(&parent) / (gckdiv + 1);
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clk_free(&parent);
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return clk_rate;
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}
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static ulong generic_clk_set_rate(struct clk *clk, ulong rate)
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{
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struct pmc_platdata *plat = dev_get_platdata(clk->dev);
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struct at91_pmc *pmc = plat->reg_base;
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struct generic_clk_priv *priv = dev_get_priv(clk->dev);
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struct clk parent, best_parent;
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ulong tmp_rate, best_rate = rate, parent_rate;
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int tmp_diff, best_diff = -1;
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u32 div, best_div = 0;
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u8 best_parent_index, best_clock_source = 0;
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u8 i;
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u32 tmp;
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int ret;
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for (i = 0; i < priv->num_parents; i++) {
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ret = clk_get_by_index(dev_get_parent(clk->dev), i, &parent);
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if (ret)
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return ret;
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parent_rate = clk_get_rate(&parent);
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if (IS_ERR_VALUE(parent_rate))
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return parent_rate;
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for (div = 1; div < GENERATED_MAX_DIV + 2; div++) {
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tmp_rate = DIV_ROUND_CLOSEST(parent_rate, div);
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tmp_diff = abs(rate - tmp_rate);
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if (best_diff < 0 || best_diff > tmp_diff) {
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best_rate = tmp_rate;
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best_diff = tmp_diff;
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best_div = div - 1;
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best_parent = parent;
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best_parent_index = i;
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best_clock_source = best_parent_index + 1;
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}
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if (!best_diff || tmp_rate < rate)
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break;
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}
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if (!best_diff)
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break;
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}
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debug("GCK: best parent: %s, best_rate = %ld, best_div = %d\n",
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best_parent.dev->name, best_rate, best_div);
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ret = clk_enable(&best_parent);
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if (ret)
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return ret;
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writel(clk->id & AT91_PMC_PCR_PID_MASK, &pmc->pcr);
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tmp = readl(&pmc->pcr);
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tmp &= ~(AT91_PMC_PCR_GCKDIV | AT91_PMC_PCR_GCKCSS);
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tmp |= AT91_PMC_PCR_GCKCSS_(best_clock_source) |
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AT91_PMC_PCR_CMD_WRITE |
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AT91_PMC_PCR_GCKDIV_(best_div) |
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AT91_PMC_PCR_GCKEN;
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writel(tmp, &pmc->pcr);
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while (!(readl(&pmc->sr) & AT91_PMC_GCKRDY))
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;
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return 0;
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}
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static struct clk_ops generic_clk_ops = {
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.of_xlate = at91_clk_of_xlate,
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.get_rate = generic_clk_get_rate,
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.set_rate = generic_clk_set_rate,
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};
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static int generic_clk_ofdata_to_platdata(struct udevice *dev)
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{
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struct generic_clk_priv *priv = dev_get_priv(dev);
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u32 cells[GENERATED_SOURCE_MAX];
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u32 num_parents;
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num_parents = fdtdec_get_int_array_count(gd->fdt_blob,
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dev_of_offset(dev_get_parent(dev)), "clocks", cells,
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GENERATED_SOURCE_MAX);
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if (!num_parents)
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return -1;
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priv->num_parents = num_parents;
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return 0;
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}
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U_BOOT_DRIVER(generic_clk) = {
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.name = "generic-clk",
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.id = UCLASS_CLK,
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.probe = at91_clk_probe,
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.ofdata_to_platdata = generic_clk_ofdata_to_platdata,
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.priv_auto_alloc_size = sizeof(struct generic_clk_priv),
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.platdata_auto_alloc_size = sizeof(struct pmc_platdata),
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.ops = &generic_clk_ops,
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};
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