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https://github.com/brain-hackers/u-boot-brain
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![Patrice Chotard](/assets/img/avatar_default.png)
Add SDHCI host controller found on STMicroelectronics SoCs On some ST SoCs, i.e. STiH407/STiH410, the MMC devices can live inside a dedicated flashSS sub-system that provides an extend subset of registers that can be used to configure the Arasan MMC/SD Host Controller. This means, that the SDHCI Arasan Controller can be configured to be eMMC4.5 or 4.3 spec compliant. W/o these settings the SDHCI will configure and use the MMC/SD controller with limited features e.g. PIO mode, no DMA, no HS etc. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
71 lines
2.2 KiB
Makefile
71 lines
2.2 KiB
Makefile
#
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# (C) Copyright 2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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ifdef CONFIG_DM_MMC
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obj-$(CONFIG_GENERIC_MMC) += mmc-uclass.o
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endif
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ifndef CONFIG_BLK
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obj-$(CONFIG_GENERIC_MMC) += mmc_legacy.o
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endif
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obj-$(CONFIG_ARM_PL180_MMCI) += arm_pl180_mmci.o
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obj-$(CONFIG_BFIN_SDH) += bfin_sdh.o
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obj-$(CONFIG_MMC_DAVINCI) += davinci_mmc.o
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obj-$(CONFIG_MMC_DW) += dw_mmc.o
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obj-$(CONFIG_MMC_DW_EXYNOS) += exynos_dw_mmc.o
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obj-$(CONFIG_MMC_DW_K3) += hi6220_dw_mmc.o
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obj-$(CONFIG_MMC_DW_ROCKCHIP) += rockchip_dw_mmc.o
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obj-$(CONFIG_MMC_DW_SOCFPGA) += socfpga_dw_mmc.o
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obj-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o
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obj-$(CONFIG_FTSDC010) += ftsdc010_mci.o
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obj-$(CONFIG_GENERIC_MMC) += mmc.o
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ifdef CONFIG_SUPPORT_EMMC_BOOT
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obj-$(CONFIG_GENERIC_MMC) += mmc_boot.o
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endif
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obj-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o
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obj-$(CONFIG_MMC_SPI) += mmc_spi.o
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obj-$(CONFIG_MVEBU_MMC) += mvebu_mmc.o
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obj-$(CONFIG_MMC_OMAP_HS) += omap_hsmmc.o
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obj-$(CONFIG_MMC_MXC) += mxcmmc.o
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obj-$(CONFIG_MMC_MXS) += mxsmmc.o
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obj-$(CONFIG_X86) += pci_mmc.o
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obj-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o
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obj-$(CONFIG_SUPPORT_EMMC_RPMB) += rpmb.o
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obj-$(CONFIG_S3C_SDI) += s3c_sdi.o
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obj-$(CONFIG_MMC_SANDBOX) += sandbox_mmc.o
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obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
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obj-$(CONFIG_SH_SDHI) += sh_sdhi.o
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ifdef CONFIG_SPL_BUILD
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obj-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o
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obj-$(CONFIG_SPL_SAVEENV) += mmc_write.o
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else
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obj-$(CONFIG_GENERIC_MMC) += mmc_write.o
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endif
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# SDHCI
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obj-$(CONFIG_MMC_SDHCI) += sdhci.o
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obj-$(CONFIG_MMC_SDHCI_ATMEL) += atmel_sdhci.o
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obj-$(CONFIG_MMC_SDHCI_BCM2835) += bcm2835_sdhci.o
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obj-$(CONFIG_MMC_SDHCI_CADENCE) += sdhci-cadence.o
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obj-$(CONFIG_MMC_SDHCI_KONA) += kona_sdhci.o
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obj-$(CONFIG_MMC_SDHCI_MSM) += msm_sdhci.o
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obj-$(CONFIG_MMC_SDHCI_MV) += mv_sdhci.o
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obj-$(CONFIG_MMC_SDHCI_PIC32) += pic32_sdhci.o
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obj-$(CONFIG_MMC_SDHCI_ROCKCHIP) += rockchip_sdhci.o
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obj-$(CONFIG_MMC_SDHCI_S5P) += s5p_sdhci.o
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obj-$(CONFIG_MMC_SDHCI_SPEAR) += spear_sdhci.o
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obj-$(CONFIG_MMC_SDHCI_STI) += sti_sdhci.o
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obj-$(CONFIG_MMC_SDHCI_TEGRA) += tegra_mmc.o
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obj-$(CONFIG_MMC_SDHCI_XENON) += xenon_sdhci.o
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obj-$(CONFIG_MMC_SDHCI_ZYNQ) += zynq_sdhci.o
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obj-$(CONFIG_MMC_SUNXI) += sunxi_mmc.o
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obj-$(CONFIG_MMC_UNIPHIER) += uniphier-sd.o
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