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![Wenyou Yang](/assets/img/avatar_default.png)
For the peripheral clock, provide the clock ops for the clock provider, such as spi0_clk. The .of_xlate is to get the clk->id, the .enable is to enable the spi0 peripheral clock, the .get_rate is to get the clock frequency. The driver for periph32ck node is responsible for recursively binding its children as clk devices, not provide the clock ops. So do the generated clock and system clock. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Stephen Warren <swarren@nvidia.com>
22 lines
485 B
C
22 lines
485 B
C
/*
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* Copyright (C) 2016 Atmel Corporation
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* Wenyou.Yang <wenyou.yang@atmel.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __AT91_PMC_H__
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#define __AT91_PMC_H__
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struct pmc_platdata {
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struct at91_pmc *reg_base;
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};
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int at91_pmc_core_probe(struct udevice *dev);
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int at91_clk_sub_device_bind(struct udevice *dev, const char *drv_name);
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int at91_clk_of_xlate(struct clk *clk, struct fdtdec_phandle_args *args);
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int at91_clk_probe(struct udevice *dev);
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#endif
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