mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
a6151916cb
add RCC clock driver for STMP32MP157 - base on driver model = UCLASS_CLK - support ops to enable, disable and get rate of all SOC clock needed by U-Boot Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
28 lines
891 B
Makefile
28 lines
891 B
Makefile
#
|
|
# Copyright (c) 2015 Google, Inc
|
|
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
|
#
|
|
# SPDX-License-Identifier: GPL-2.0+
|
|
#
|
|
|
|
obj-$(CONFIG_$(SPL_TPL_)CLK) += clk-uclass.o clk_fixed_rate.o
|
|
|
|
obj-y += tegra/
|
|
obj-$(CONFIG_ARCH_ASPEED) += aspeed/
|
|
obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
|
|
obj-$(CONFIG_CLK_AT91) += at91/
|
|
obj-$(CONFIG_CLK_BCM6345) += clk_bcm6345.o
|
|
obj-$(CONFIG_CLK_BOSTON) += clk_boston.o
|
|
obj-$(CONFIG_CLK_EXYNOS) += exynos/
|
|
obj-$(CONFIG_CLK_HSDK) += clk-hsdk-cgu.o
|
|
obj-$(CONFIG_CLK_RENESAS) += renesas/
|
|
obj-$(CONFIG_CLK_STM32F) += clk_stm32f.o
|
|
obj-$(CONFIG_CLK_STM32MP1) += clk_stm32mp1.o
|
|
obj-$(CONFIG_CLK_UNIPHIER) += uniphier/
|
|
obj-$(CONFIG_CLK_ZYNQ) += clk_zynq.o
|
|
obj-$(CONFIG_CLK_ZYNQMP) += clk_zynqmp.o
|
|
obj-$(CONFIG_MACH_PIC32) += clk_pic32.o
|
|
obj-$(CONFIG_SANDBOX) += clk_sandbox.o
|
|
obj-$(CONFIG_SANDBOX) += clk_sandbox_test.o
|
|
obj-$(CONFIG_STM32H7) += clk_stm32h7.o
|