mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-10 12:13:46 +09:00
af104ae5b8
commit 20f1471416 ("imx: spl: Update NAND bootmode detection bit")
broke the NAND bootmode detection by checking if
BOOT_CFG1[7:4] == 0x8 for NAND boot mode.
This commit essentially reverts it, while using the IMX6_BMODE_*
macros that were introduced since.
Tables 8-7 & 8-10 from IMX6DQRM say the NAND boot mode selection
is done when BOOT_CFG1[7] is 1, but BOOT_CFG1[6:4] is not
necessarily 0x0 in this case.
Actually, NAND boot mode is when 0x8 <= BOOT_CFG1[7:4] <= 0xf,
like it was in the code before.
Signed-off-by: Eran Matityahu <eran.m@variscite.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Jagan Teki <jagan@openedev.com>
Cc: Tim Harvey <tharvey@gateworks.com>
112 lines
2.3 KiB
C
112 lines
2.3 KiB
C
/*
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* Copyright (C) 2016 Amarula Solutions B.V.
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* Copyright (C) 2016 Engicam S.r.l.
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* Author: Jagan Teki <jagan@amarulasolutions.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <mmc.h>
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#include <asm/arch/sys_proto.h>
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#include "board.h"
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_ENV_IS_IN_MMC
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static void mmc_late_init(void)
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{
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char cmd[32];
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char mmcblk[32];
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u32 dev_no = mmc_get_env_dev();
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env_set_ulong("mmcdev", dev_no);
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/* Set mmcblk env */
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sprintf(mmcblk, "/dev/mmcblk%dp2 rootwait rw", dev_no);
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env_set("mmcroot", mmcblk);
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sprintf(cmd, "mmc dev %d", dev_no);
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run_command(cmd, 0);
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}
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#endif
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static void setenv_fdt_file(void)
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{
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const char *cmp_dtb = CONFIG_DEFAULT_DEVICE_TREE;
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if (!strcmp(cmp_dtb, "imx6q-icore")) {
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if (is_mx6dq())
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env_set("fdt_file", "imx6q-icore.dtb");
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else if(is_mx6dl() || is_mx6solo())
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env_set("fdt_file", "imx6dl-icore.dtb");
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} else if (!strcmp(cmp_dtb, "imx6q-icore-rqs")) {
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if (is_mx6dq())
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env_set("fdt_file", "imx6q-icore-rqs.dtb");
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else if(is_mx6dl() || is_mx6solo())
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env_set("fdt_file", "imx6dl-icore-rqs.dtb");
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} else if (!strcmp(cmp_dtb, "imx6ul-geam-kit"))
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env_set("fdt_file", "imx6ul-geam-kit.dtb");
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else if (!strcmp(cmp_dtb, "imx6ul-isiot-mmc"))
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env_set("fdt_file", "imx6ul-isiot-emmc.dtb");
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else if (!strcmp(cmp_dtb, "imx6ul-isiot-emmc"))
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env_set("fdt_file", "imx6ul-isiot-emmc.dtb");
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else if (!strcmp(cmp_dtb, "imx6ul-isiot-nand"))
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env_set("fdt_file", "imx6ul-isiot-nand.dtb");
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}
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int board_late_init(void)
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{
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switch ((imx6_src_get_boot_mode() & IMX6_BMODE_MASK) >>
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IMX6_BMODE_SHIFT) {
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case IMX6_BMODE_SD:
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case IMX6_BMODE_ESD:
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case IMX6_BMODE_MMC:
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case IMX6_BMODE_EMMC:
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#ifdef CONFIG_ENV_IS_IN_MMC
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mmc_late_init();
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#endif
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env_set("modeboot", "mmcboot");
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break;
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case IMX6_BMODE_NAND_MIN ... IMX6_BMODE_NAND_MAX:
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env_set("modeboot", "nandboot");
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break;
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default:
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env_set("modeboot", "");
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break;
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}
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if (is_mx6ul())
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env_set("console", "ttymxc0");
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else
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env_set("console", "ttymxc3");
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setenv_fdt_file();
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return 0;
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}
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int board_init(void)
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{
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/* Address of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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#ifdef CONFIG_NAND_MXS
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setup_gpmi_nand();
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#endif
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#ifdef CONFIG_VIDEO_IPUV3
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setup_display();
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#endif
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return 0;
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}
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int dram_init(void)
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{
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gd->ram_size = imx_ddr_size();
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return 0;
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}
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