mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
4c12eeb8b5
Change all files in common/ to use CMD_RET_USAGE instead of calling cmd_usage() directly. I'm not completely sure about this patch since the code since impact is small (100 byte or so on ARM) and it might need splitting into smaller patches. But for now here it is. Signed-off-by: Simon Glass <sjg@chromium.org>
441 lines
12 KiB
C
441 lines
12 KiB
C
/*
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* (C) Copyright 2000, 2001
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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/*
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* Support for read and write access to EEPROM like memory devices. This
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* includes regular EEPROM as well as FRAM (ferroelectic nonvolaile RAM).
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* FRAM devices read and write data at bus speed. In particular, there is no
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* write delay. Also, there is no limit imposed on the number of bytes that can
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* be transferred with a single read or write.
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*
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* Use the following configuration options to ensure no unneeded performance
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* degradation (typical for EEPROM) is incured for FRAM memory:
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*
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* #define CONFIG_SYS_I2C_FRAM
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* #undef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
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*
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*/
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#include <common.h>
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#include <config.h>
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#include <command.h>
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#include <i2c.h>
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extern void eeprom_init (void);
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extern int eeprom_read (unsigned dev_addr, unsigned offset,
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uchar *buffer, unsigned cnt);
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extern int eeprom_write (unsigned dev_addr, unsigned offset,
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uchar *buffer, unsigned cnt);
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#if defined(CONFIG_SYS_EEPROM_WREN)
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extern int eeprom_write_enable (unsigned dev_addr, int state);
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#endif
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#if defined(CONFIG_SYS_EEPROM_X40430)
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/* Maximum number of times to poll for acknowledge after write */
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#define MAX_ACKNOWLEDGE_POLLS 10
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#endif
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/* ------------------------------------------------------------------------- */
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#if defined(CONFIG_CMD_EEPROM)
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int do_eeprom ( cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
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{
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const char *const fmt =
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"\nEEPROM @0x%lX %s: addr %08lx off %04lx count %ld ... ";
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#if defined(CONFIG_SYS_I2C_MULTI_EEPROMS)
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if (argc == 6) {
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ulong dev_addr = simple_strtoul (argv[2], NULL, 16);
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ulong addr = simple_strtoul (argv[3], NULL, 16);
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ulong off = simple_strtoul (argv[4], NULL, 16);
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ulong cnt = simple_strtoul (argv[5], NULL, 16);
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#else
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if (argc == 5) {
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ulong dev_addr = CONFIG_SYS_DEF_EEPROM_ADDR;
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ulong addr = simple_strtoul (argv[2], NULL, 16);
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ulong off = simple_strtoul (argv[3], NULL, 16);
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ulong cnt = simple_strtoul (argv[4], NULL, 16);
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#endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */
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# if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
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eeprom_init ();
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# endif /* !CONFIG_SPI */
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if (strcmp (argv[1], "read") == 0) {
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int rcode;
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printf (fmt, dev_addr, argv[1], addr, off, cnt);
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rcode = eeprom_read (dev_addr, off, (uchar *) addr, cnt);
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puts ("done\n");
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return rcode;
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} else if (strcmp (argv[1], "write") == 0) {
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int rcode;
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printf (fmt, dev_addr, argv[1], addr, off, cnt);
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rcode = eeprom_write (dev_addr, off, (uchar *) addr, cnt);
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puts ("done\n");
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return rcode;
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}
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}
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return CMD_RET_USAGE;
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}
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#endif
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/*-----------------------------------------------------------------------
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*
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* for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
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* 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
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*
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* for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
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* 0x00000nxx for EEPROM address selectors and page number at n.
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*/
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#if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
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#if !defined(CONFIG_SYS_I2C_EEPROM_ADDR_LEN) || CONFIG_SYS_I2C_EEPROM_ADDR_LEN < 1 || CONFIG_SYS_I2C_EEPROM_ADDR_LEN > 2
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#error CONFIG_SYS_I2C_EEPROM_ADDR_LEN must be 1 or 2
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#endif
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#endif
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int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
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{
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unsigned end = offset + cnt;
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unsigned blk_off;
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int rcode = 0;
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/* Read data until done or would cross a page boundary.
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* We must write the address again when changing pages
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* because the next page may be in a different device.
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*/
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while (offset < end) {
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unsigned alen, len;
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#if !defined(CONFIG_SYS_I2C_FRAM)
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unsigned maxlen;
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#endif
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#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
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uchar addr[2];
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blk_off = offset & 0xFF; /* block offset */
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addr[0] = offset >> 8; /* block number */
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addr[1] = blk_off; /* block offset */
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alen = 2;
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#else
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uchar addr[3];
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blk_off = offset & 0xFF; /* block offset */
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addr[0] = offset >> 16; /* block number */
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addr[1] = offset >> 8; /* upper address octet */
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addr[2] = blk_off; /* lower address octet */
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alen = 3;
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#endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
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addr[0] |= dev_addr; /* insert device address */
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len = end - offset;
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/*
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* For a FRAM device there is no limit on the number of the
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* bytes that can be ccessed with the single read or write
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* operation.
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*/
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#if !defined(CONFIG_SYS_I2C_FRAM)
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maxlen = 0x100 - blk_off;
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if (maxlen > I2C_RXTX_LEN)
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maxlen = I2C_RXTX_LEN;
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if (len > maxlen)
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len = maxlen;
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#endif
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#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
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spi_read (addr, alen, buffer, len);
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#else
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if (i2c_read (addr[0], offset, alen-1, buffer, len) != 0)
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rcode = 1;
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#endif
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buffer += len;
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offset += len;
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}
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return rcode;
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}
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/*-----------------------------------------------------------------------
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*
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* for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
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* 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
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*
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* for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
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* 0x00000nxx for EEPROM address selectors and page number at n.
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*/
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int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
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{
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unsigned end = offset + cnt;
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unsigned blk_off;
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int rcode = 0;
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#if defined(CONFIG_SYS_EEPROM_X40430)
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uchar contr_r_addr[2];
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uchar addr_void[2];
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uchar contr_reg[2];
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uchar ctrl_reg_v;
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int i;
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#endif
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#if defined(CONFIG_SYS_EEPROM_WREN)
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eeprom_write_enable (dev_addr,1);
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#endif
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/* Write data until done or would cross a write page boundary.
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* We must write the address again when changing pages
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* because the address counter only increments within a page.
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*/
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while (offset < end) {
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unsigned alen, len;
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#if !defined(CONFIG_SYS_I2C_FRAM)
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unsigned maxlen;
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#endif
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#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
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uchar addr[2];
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blk_off = offset & 0xFF; /* block offset */
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addr[0] = offset >> 8; /* block number */
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addr[1] = blk_off; /* block offset */
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alen = 2;
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#else
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uchar addr[3];
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blk_off = offset & 0xFF; /* block offset */
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addr[0] = offset >> 16; /* block number */
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addr[1] = offset >> 8; /* upper address octet */
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addr[2] = blk_off; /* lower address octet */
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alen = 3;
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#endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
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addr[0] |= dev_addr; /* insert device address */
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len = end - offset;
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/*
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* For a FRAM device there is no limit on the number of the
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* bytes that can be accessed with the single read or write
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* operation.
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*/
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#if !defined(CONFIG_SYS_I2C_FRAM)
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#if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
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#define EEPROM_PAGE_SIZE (1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
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#define EEPROM_PAGE_OFFSET(x) ((x) & (EEPROM_PAGE_SIZE - 1))
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maxlen = EEPROM_PAGE_SIZE - EEPROM_PAGE_OFFSET(blk_off);
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#else
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maxlen = 0x100 - blk_off;
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#endif
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if (maxlen > I2C_RXTX_LEN)
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maxlen = I2C_RXTX_LEN;
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if (len > maxlen)
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len = maxlen;
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#endif
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#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
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spi_write (addr, alen, buffer, len);
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#else
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#if defined(CONFIG_SYS_EEPROM_X40430)
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/* Get the value of the control register.
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* Set current address (internal pointer in the x40430)
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* to 0x1ff.
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*/
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contr_r_addr[0] = 9;
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contr_r_addr[1] = 0xff;
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addr_void[0] = 0;
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addr_void[1] = addr[1];
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#ifdef CONFIG_SYS_I2C_EEPROM_ADDR
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contr_r_addr[0] |= CONFIG_SYS_I2C_EEPROM_ADDR;
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addr_void[0] |= CONFIG_SYS_I2C_EEPROM_ADDR;
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#endif
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contr_reg[0] = 0xff;
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if (i2c_read (contr_r_addr[0], contr_r_addr[1], 1, contr_reg, 1) != 0) {
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rcode = 1;
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}
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ctrl_reg_v = contr_reg[0];
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/* Are any of the eeprom blocks write protected?
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*/
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if (ctrl_reg_v & 0x18) {
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ctrl_reg_v &= ~0x18; /* reset block protect bits */
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ctrl_reg_v |= 0x02; /* set write enable latch */
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ctrl_reg_v &= ~0x04; /* clear RWEL */
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/* Set write enable latch.
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*/
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contr_reg[0] = 0x02;
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if (i2c_write (contr_r_addr[0], 0xff, 1, contr_reg, 1) != 0) {
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rcode = 1;
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}
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/* Set register write enable latch.
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*/
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contr_reg[0] = 0x06;
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if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
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rcode = 1;
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}
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/* Modify ctrl register.
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*/
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contr_reg[0] = ctrl_reg_v;
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if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
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rcode = 1;
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}
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/* The write (above) is an operation on NV memory.
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* These can take some time (~5ms), and the device
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* will not respond to further I2C messages till
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* it's completed the write.
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* So poll device for an I2C acknowledge.
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* When we get one we know we can continue with other
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* operations.
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*/
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contr_reg[0] = 0;
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for (i = 0; i < MAX_ACKNOWLEDGE_POLLS; i++) {
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if (i2c_read (addr_void[0], addr_void[1], 1, contr_reg, 1) == 0)
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break; /* got ack */
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#if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS)
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udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
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#endif
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}
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if (i == MAX_ACKNOWLEDGE_POLLS) {
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puts ("EEPROM poll acknowledge failed\n");
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rcode = 1;
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}
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}
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/* Is the write enable latch on?.
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*/
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else if (!(ctrl_reg_v & 0x02)) {
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/* Set write enable latch.
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*/
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contr_reg[0] = 0x02;
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if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
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rcode = 1;
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}
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}
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/* Write is enabled ... now write eeprom value.
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*/
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#endif
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if (i2c_write (addr[0], offset, alen-1, buffer, len) != 0)
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rcode = 1;
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#endif
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buffer += len;
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offset += len;
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#if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS)
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udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
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#endif
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}
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#if defined(CONFIG_SYS_EEPROM_WREN)
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eeprom_write_enable (dev_addr,0);
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#endif
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return rcode;
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}
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#if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
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int
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eeprom_probe (unsigned dev_addr, unsigned offset)
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{
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unsigned char chip;
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/* Probe the chip address
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*/
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#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
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chip = offset >> 8; /* block number */
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#else
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chip = offset >> 16; /* block number */
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#endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
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chip |= dev_addr; /* insert device address */
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return (i2c_probe (chip));
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}
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#endif
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/*-----------------------------------------------------------------------
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* Set default values
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*/
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#ifndef CONFIG_SYS_I2C_SPEED
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#define CONFIG_SYS_I2C_SPEED 50000
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#endif
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void eeprom_init (void)
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{
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#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
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spi_init_f ();
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#endif
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#if defined(CONFIG_HARD_I2C) || \
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defined(CONFIG_SOFT_I2C)
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i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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#endif
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}
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/*-----------------------------------------------------------------------
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*/
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/***************************************************/
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#if defined(CONFIG_CMD_EEPROM)
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#ifdef CONFIG_SYS_I2C_MULTI_EEPROMS
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U_BOOT_CMD(
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eeprom, 6, 1, do_eeprom,
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"EEPROM sub-system",
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"read devaddr addr off cnt\n"
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"eeprom write devaddr addr off cnt\n"
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" - read/write `cnt' bytes from `devaddr` EEPROM at offset `off'"
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);
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#else /* One EEPROM */
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U_BOOT_CMD(
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eeprom, 5, 1, do_eeprom,
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"EEPROM sub-system",
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"read addr off cnt\n"
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"eeprom write addr off cnt\n"
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" - read/write `cnt' bytes at EEPROM offset `off'"
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);
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#endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */
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#endif
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