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https://github.com/brain-hackers/u-boot-brain
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d03ad060fe
Renesas Ebisu board is based on R-Car E3 SoC which has dual CA53 and a CR7. This patch drops check for cputype from reset_cpu() and also drops the corresponding CA57 macros. While at it also dropped RST_RSTOUTCR macro which is unused. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
57 lines
1.0 KiB
C
57 lines
1.0 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* board/renesas/ebisu/ebisu.c
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* This file is Ebisu board support.
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*
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* Copyright (C) 2018 Marek Vasut <marek.vasut+renesas@gmail.com>
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*/
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#include <common.h>
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#include <cpu_func.h>
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#include <hang.h>
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#include <init.h>
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#include <malloc.h>
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#include <netdev.h>
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#include <dm.h>
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#include <dm/platform_data/serial_sh.h>
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#include <asm/processor.h>
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#include <asm/mach-types.h>
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#include <asm/io.h>
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#include <linux/errno.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/gpio.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/rmobile.h>
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#include <asm/arch/rcar-mstp.h>
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#include <asm/arch/sh_sdhi.h>
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#include <i2c.h>
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#include <mmc.h>
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DECLARE_GLOBAL_DATA_PTR;
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void s_init(void)
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{
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}
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int board_early_init_f(void)
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{
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return 0;
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}
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int board_init(void)
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{
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/* adress of boot parameters */
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gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000;
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return 0;
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}
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#define RST_BASE 0xE6160000
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#define RST_CA53RESCNT (RST_BASE + 0x44)
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#define RST_CA53_CODE 0x5A5A000F
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void reset_cpu(ulong addr)
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{
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writel(RST_CA53_CODE, RST_CA53RESCNT);
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}
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