mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-06 03:06:16 +09:00
d024236e5a
We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com>
474 lines
12 KiB
C
474 lines
12 KiB
C
/*
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* Copyright (C) 2011 Samsung Electronics
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* Heungjun Kim <riverful.kim@samsung.com>
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* Kyungmin Park <kyungmin.park@samsung.com>
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* Donghwa Lee <dh09.lee@samsung.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <lcd.h>
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#include <asm/io.h>
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#include <asm/gpio.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/pinmux.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/mipi_dsim.h>
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#include <asm/arch/watchdog.h>
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#include <asm/arch/power.h>
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#include <power/pmic.h>
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#include <usb/dwc2_udc.h>
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#include <power/max8997_pmic.h>
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#include <power/max8997_muic.h>
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#include <power/battery.h>
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#include <power/max17042_fg.h>
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#include <power/pmic.h>
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#include <libtizen.h>
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#include <usb.h>
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#include <usb_mass_storage.h>
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#include "setup.h"
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unsigned int board_rev;
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#ifdef CONFIG_REVISION_TAG
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u32 get_board_rev(void)
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{
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return board_rev;
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}
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#endif
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static void check_hw_revision(void);
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struct dwc2_plat_otg_data s5pc210_otg_data;
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int exynos_init(void)
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{
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check_hw_revision();
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printf("HW Revision:\t0x%x\n", board_rev);
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return 0;
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}
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#ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
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static void trats_low_power_mode(void)
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{
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struct exynos4_clock *clk =
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(struct exynos4_clock *)samsung_get_base_clock();
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struct exynos4_power *pwr =
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(struct exynos4_power *)samsung_get_base_power();
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/* Power down CORE1 */
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/* LOCAL_PWR_CFG [1:0] 0x3 EN, 0x0 DIS */
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writel(0x0, &pwr->arm_core1_configuration);
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/* Change the APLL frequency */
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/* ENABLE (1 enable) | LOCKED (1 locked) */
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/* [31] | [29] */
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/* FSEL | MDIV | PDIV | SDIV */
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/* [27] | [25:16] | [13:8] | [2:0] */
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writel(0xa0c80604, &clk->apll_con0);
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/* Change CPU0 clock divider */
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/* CORE2_RATIO | APLL_RATIO | PCLK_DBG_RATIO | ATB_RATIO */
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/* [30:28] | [26:24] | [22:20] | [18:16] */
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/* PERIPH_RATIO | COREM1_RATIO | COREM0_RATIO | CORE_RATIO */
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/* [14:12] | [10:8] | [6:4] | [2:0] */
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writel(0x00000100, &clk->div_cpu0);
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/* CLK_DIV_STAT_CPU0 - wait until clock gets stable (0 = stable) */
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while (readl(&clk->div_stat_cpu0) & 0x1111111)
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continue;
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/* Change clock divider ratio for DMC */
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/* DMCP_RATIO | DMCD_RATIO */
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/* [22:20] | [18:16] */
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/* DMC_RATIO | DPHY_RATIO | ACP_PCLK_RATIO | ACP_RATIO */
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/* [14:12] | [10:8] | [6:4] | [2:0] */
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writel(0x13113117, &clk->div_dmc0);
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/* CLK_DIV_STAT_DMC0 - wait until clock gets stable (0 = stable) */
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while (readl(&clk->div_stat_dmc0) & 0x11111111)
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continue;
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/* Turn off unnecessary power domains */
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writel(0x0, &pwr->xxti_configuration); /* XXTI */
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writel(0x0, &pwr->cam_configuration); /* CAM */
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writel(0x0, &pwr->tv_configuration); /* TV */
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writel(0x0, &pwr->mfc_configuration); /* MFC */
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writel(0x0, &pwr->g3d_configuration); /* G3D */
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writel(0x0, &pwr->gps_configuration); /* GPS */
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writel(0x0, &pwr->gps_alive_configuration); /* GPS_ALIVE */
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/* Turn off unnecessary clocks */
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writel(0x0, &clk->gate_ip_cam); /* CAM */
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writel(0x0, &clk->gate_ip_tv); /* TV */
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writel(0x0, &clk->gate_ip_mfc); /* MFC */
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writel(0x0, &clk->gate_ip_g3d); /* G3D */
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writel(0x0, &clk->gate_ip_image); /* IMAGE */
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writel(0x0, &clk->gate_ip_gps); /* GPS */
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}
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#endif
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int exynos_power_init(void)
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{
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#ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
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int chrg, ret;
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struct power_battery *pb;
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struct pmic *p_fg, *p_chrg, *p_muic, *p_bat;
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/*
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* For PMIC/MUIC the I2C bus is named as I2C5, but it is connected
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* to logical I2C adapter 0
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*
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* The FUEL_GAUGE is marked as I2C9 on the schematic, but connected
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* to logical I2C adapter 1
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*/
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ret = power_fg_init(I2C_9);
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ret |= power_muic_init(I2C_5);
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ret |= power_bat_init(0);
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if (ret)
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return ret;
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p_fg = pmic_get("MAX17042_FG");
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if (!p_fg) {
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puts("MAX17042_FG: Not found\n");
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return -ENODEV;
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}
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p_chrg = pmic_get("MAX8997_PMIC");
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if (!p_chrg) {
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puts("MAX8997_PMIC: Not found\n");
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return -ENODEV;
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}
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p_muic = pmic_get("MAX8997_MUIC");
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if (!p_muic) {
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puts("MAX8997_MUIC: Not found\n");
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return -ENODEV;
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}
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p_bat = pmic_get("BAT_TRATS");
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if (!p_bat) {
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puts("BAT_TRATS: Not found\n");
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return -ENODEV;
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}
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p_fg->parent = p_bat;
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p_chrg->parent = p_bat;
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p_muic->parent = p_bat;
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p_bat->low_power_mode = trats_low_power_mode;
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p_bat->pbat->battery_init(p_bat, p_fg, p_chrg, p_muic);
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pb = p_bat->pbat;
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chrg = p_muic->chrg->chrg_type(p_muic);
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debug("CHARGER TYPE: %d\n", chrg);
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if (!p_chrg->chrg->chrg_bat_present(p_chrg)) {
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puts("No battery detected\n");
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return 0;
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}
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p_fg->fg->fg_battery_check(p_fg, p_bat);
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if (pb->bat->state == CHARGE && chrg == CHARGER_USB)
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puts("CHARGE Battery !\n");
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#endif
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return 0;
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}
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static unsigned int get_hw_revision(void)
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{
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int hwrev = 0;
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char str[10];
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int i;
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/* hw_rev[3:0] == GPE1[3:0] */
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for (i = 0; i < 4; i++) {
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int pin = i + EXYNOS4_GPIO_E10;
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sprintf(str, "hw_rev%d", i);
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gpio_request(pin, str);
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gpio_cfg_pin(pin, S5P_GPIO_INPUT);
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gpio_set_pull(pin, S5P_GPIO_PULL_NONE);
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}
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udelay(1);
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for (i = 0; i < 4; i++)
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hwrev |= (gpio_get_value(EXYNOS4_GPIO_E10 + i) << i);
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debug("hwrev 0x%x\n", hwrev);
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return hwrev;
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}
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static void check_hw_revision(void)
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{
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int hwrev;
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hwrev = get_hw_revision();
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board_rev |= hwrev;
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}
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#ifdef CONFIG_USB_GADGET
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static int s5pc210_phy_control(int on)
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{
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struct udevice *dev;
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int reg, ret;
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ret = pmic_get("max8997-pmic", &dev);
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if (ret)
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return ret;
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if (on) {
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reg = pmic_reg_read(dev, MAX8997_REG_SAFEOUTCTRL);
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reg |= ENSAFEOUT1;
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ret = pmic_reg_write(dev, MAX8997_REG_SAFEOUTCTRL, reg);
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if (ret) {
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puts("MAX8997 setting error!\n");
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return ret;
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}
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reg = pmic_reg_read(dev, MAX8997_REG_LDO3CTRL);
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reg |= EN_LDO;
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ret = pmic_reg_write(dev, MAX8997_REG_LDO3CTRL, reg);
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if (ret) {
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puts("MAX8997 setting error!\n");
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return ret;
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}
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reg = pmic_reg_read(dev, MAX8997_REG_LDO8CTRL);
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reg |= EN_LDO;
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ret = pmic_reg_write(dev, MAX8997_REG_LDO8CTRL, reg);
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if (ret) {
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puts("MAX8997 setting error!\n");
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return ret;
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}
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} else {
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reg = pmic_reg_read(dev, MAX8997_REG_LDO8CTRL);
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reg &= DIS_LDO;
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ret = pmic_reg_write(dev, MAX8997_REG_LDO8CTRL, reg);
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if (ret) {
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puts("MAX8997 setting error!\n");
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return ret;
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}
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reg = pmic_reg_read(dev, MAX8997_REG_LDO3CTRL);
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reg &= DIS_LDO;
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ret = pmic_reg_write(dev, MAX8997_REG_LDO3CTRL, reg);
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if (ret) {
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puts("MAX8997 setting error!\n");
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return ret;
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}
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reg = pmic_reg_read(dev, MAX8997_REG_SAFEOUTCTRL);
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reg &= ~ENSAFEOUT1;
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ret = pmic_reg_write(dev, MAX8997_REG_SAFEOUTCTRL, reg);
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if (ret) {
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puts("MAX8997 setting error!\n");
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return ret;
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}
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}
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return 0;
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}
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struct dwc2_plat_otg_data s5pc210_otg_data = {
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.phy_control = s5pc210_phy_control,
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.regs_phy = EXYNOS4_USBPHY_BASE,
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.regs_otg = EXYNOS4_USBOTG_BASE,
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.usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
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.usb_flags = PHY0_SLEEP,
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};
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int board_usb_init(int index, enum usb_init_type init)
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{
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debug("USB_udc_probe\n");
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return dwc2_udc_probe(&s5pc210_otg_data);
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}
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int g_dnl_board_usb_cable_connected(void)
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{
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#ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
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struct pmic *muic = pmic_get("MAX8997_MUIC");
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if (!muic)
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return 0;
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return !!muic->chrg->chrg_type(muic);
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#else
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return false;
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#endif
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}
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#endif
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static void pmic_reset(void)
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{
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gpio_direction_output(EXYNOS4_GPIO_X07, 1);
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gpio_set_pull(EXYNOS4_GPIO_X27, S5P_GPIO_PULL_NONE);
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}
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static void board_clock_init(void)
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{
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struct exynos4_clock *clk =
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(struct exynos4_clock *)samsung_get_base_clock();
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writel(CLK_SRC_CPU_VAL, (unsigned int)&clk->src_cpu);
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writel(CLK_SRC_TOP0_VAL, (unsigned int)&clk->src_top0);
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writel(CLK_SRC_FSYS_VAL, (unsigned int)&clk->src_fsys);
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writel(CLK_SRC_PERIL0_VAL, (unsigned int)&clk->src_peril0);
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writel(CLK_DIV_CPU0_VAL, (unsigned int)&clk->div_cpu0);
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writel(CLK_DIV_CPU1_VAL, (unsigned int)&clk->div_cpu1);
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writel(CLK_DIV_DMC0_VAL, (unsigned int)&clk->div_dmc0);
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writel(CLK_DIV_DMC1_VAL, (unsigned int)&clk->div_dmc1);
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writel(CLK_DIV_LEFTBUS_VAL, (unsigned int)&clk->div_leftbus);
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writel(CLK_DIV_RIGHTBUS_VAL, (unsigned int)&clk->div_rightbus);
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writel(CLK_DIV_TOP_VAL, (unsigned int)&clk->div_top);
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writel(CLK_DIV_FSYS1_VAL, (unsigned int)&clk->div_fsys1);
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writel(CLK_DIV_FSYS2_VAL, (unsigned int)&clk->div_fsys2);
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writel(CLK_DIV_FSYS3_VAL, (unsigned int)&clk->div_fsys3);
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writel(CLK_DIV_PERIL0_VAL, (unsigned int)&clk->div_peril0);
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writel(CLK_DIV_PERIL3_VAL, (unsigned int)&clk->div_peril3);
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writel(PLL_LOCKTIME, (unsigned int)&clk->apll_lock);
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writel(PLL_LOCKTIME, (unsigned int)&clk->mpll_lock);
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writel(PLL_LOCKTIME, (unsigned int)&clk->epll_lock);
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writel(PLL_LOCKTIME, (unsigned int)&clk->vpll_lock);
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writel(APLL_CON1_VAL, (unsigned int)&clk->apll_con1);
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writel(APLL_CON0_VAL, (unsigned int)&clk->apll_con0);
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writel(MPLL_CON1_VAL, (unsigned int)&clk->mpll_con1);
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writel(MPLL_CON0_VAL, (unsigned int)&clk->mpll_con0);
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writel(EPLL_CON1_VAL, (unsigned int)&clk->epll_con1);
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writel(EPLL_CON0_VAL, (unsigned int)&clk->epll_con0);
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writel(VPLL_CON1_VAL, (unsigned int)&clk->vpll_con1);
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writel(VPLL_CON0_VAL, (unsigned int)&clk->vpll_con0);
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writel(CLK_GATE_IP_CAM_VAL, (unsigned int)&clk->gate_ip_cam);
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writel(CLK_GATE_IP_VP_VAL, (unsigned int)&clk->gate_ip_tv);
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writel(CLK_GATE_IP_MFC_VAL, (unsigned int)&clk->gate_ip_mfc);
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writel(CLK_GATE_IP_G3D_VAL, (unsigned int)&clk->gate_ip_g3d);
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writel(CLK_GATE_IP_IMAGE_VAL, (unsigned int)&clk->gate_ip_image);
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writel(CLK_GATE_IP_LCD0_VAL, (unsigned int)&clk->gate_ip_lcd0);
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writel(CLK_GATE_IP_LCD1_VAL, (unsigned int)&clk->gate_ip_lcd1);
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writel(CLK_GATE_IP_FSYS_VAL, (unsigned int)&clk->gate_ip_fsys);
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writel(CLK_GATE_IP_GPS_VAL, (unsigned int)&clk->gate_ip_gps);
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writel(CLK_GATE_IP_PERIL_VAL, (unsigned int)&clk->gate_ip_peril);
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writel(CLK_GATE_IP_PERIR_VAL, (unsigned int)&clk->gate_ip_perir);
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writel(CLK_GATE_BLOCK_VAL, (unsigned int)&clk->gate_block);
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}
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static void board_power_init(void)
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{
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struct exynos4_power *pwr =
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(struct exynos4_power *)samsung_get_base_power();
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/* PS HOLD */
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writel(EXYNOS4_PS_HOLD_CON_VAL, (unsigned int)&pwr->ps_hold_control);
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/* Set power down */
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writel(0, (unsigned int)&pwr->cam_configuration);
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writel(0, (unsigned int)&pwr->tv_configuration);
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writel(0, (unsigned int)&pwr->mfc_configuration);
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writel(0, (unsigned int)&pwr->g3d_configuration);
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writel(0, (unsigned int)&pwr->lcd1_configuration);
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writel(0, (unsigned int)&pwr->gps_configuration);
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writel(0, (unsigned int)&pwr->gps_alive_configuration);
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/* It is necessary to power down core 1 */
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/* to successfully boot CPU1 in kernel */
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writel(0, (unsigned int)&pwr->arm_core1_configuration);
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}
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static void exynos_uart_init(void)
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{
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/* UART_SEL GPY4[7] (part2) at EXYNOS4 */
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gpio_request(EXYNOS4_GPIO_Y47, "uart_sel");
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gpio_set_pull(EXYNOS4_GPIO_Y47, S5P_GPIO_PULL_UP);
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gpio_direction_output(EXYNOS4_GPIO_Y47, 1);
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}
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int exynos_early_init_f(void)
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{
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wdt_stop();
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pmic_reset();
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board_clock_init();
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exynos_uart_init();
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board_power_init();
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return 0;
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}
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void exynos_reset_lcd(void)
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{
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gpio_request(EXYNOS4_GPIO_Y45, "lcd_reset");
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gpio_direction_output(EXYNOS4_GPIO_Y45, 1);
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udelay(10000);
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gpio_direction_output(EXYNOS4_GPIO_Y45, 0);
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udelay(10000);
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gpio_direction_output(EXYNOS4_GPIO_Y45, 1);
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}
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int lcd_power(void)
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{
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#ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
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int ret = 0;
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struct pmic *p = pmic_get("MAX8997_PMIC");
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if (!p)
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return -ENODEV;
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if (pmic_probe(p))
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return 0;
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/* LDO15 voltage: 2.2v */
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ret |= pmic_reg_write(p, MAX8997_REG_LDO15CTRL, 0x1c | EN_LDO);
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/* LDO13 voltage: 3.0v */
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ret |= pmic_reg_write(p, MAX8997_REG_LDO13CTRL, 0x2c | EN_LDO);
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if (ret) {
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puts("MAX8997 LDO setting error!\n");
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return -1;
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}
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#endif
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return 0;
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}
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int mipi_power(void)
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{
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#ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
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int ret = 0;
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struct pmic *p = pmic_get("MAX8997_PMIC");
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if (!p)
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return -ENODEV;
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if (pmic_probe(p))
|
|
return 0;
|
|
|
|
/* LDO3 voltage: 1.1v */
|
|
ret |= pmic_reg_write(p, MAX8997_REG_LDO3CTRL, 0x6 | EN_LDO);
|
|
/* LDO4 voltage: 1.8v */
|
|
ret |= pmic_reg_write(p, MAX8997_REG_LDO4CTRL, 0x14 | EN_LDO);
|
|
|
|
if (ret) {
|
|
puts("MAX8997 LDO setting error!\n");
|
|
return -1;
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_LCD
|
|
void exynos_lcd_misc_init(vidinfo_t *vid)
|
|
{
|
|
#ifdef CONFIG_TIZEN
|
|
get_tizen_logo_info(vid);
|
|
#endif
|
|
#ifdef CONFIG_S6E8AX0
|
|
s6e8ax0_init();
|
|
env_set("lcdinfo", "lcd=s6e8ax0");
|
|
#endif
|
|
}
|
|
#endif
|