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https://github.com/brain-hackers/u-boot-brain
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ca0d29e4f0
This simple PMU driver allows to tyrn power on and off for selected devices. In particularly Intel Tangier needs to power on SDHCI controllers in order to access to them during board initialization. In the future it might be expanded to cover other Intel MID platforms, that's why it's located under arch/x86/lib and called pmu.c. Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
118 lines
2.1 KiB
C
118 lines
2.1 KiB
C
/*
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* Copyright (c) 2017 Intel Corporation
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <regmap.h>
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#include <syscon.h>
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#include <asm/cpu.h>
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#include <asm/pmu.h>
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#include <linux/errno.h>
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#include <linux/io.h>
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/* Registers */
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struct pmu_regs {
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u32 sts;
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u32 cmd;
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u32 ics;
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u32 reserved;
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u32 wkc[4];
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u32 wks[4];
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u32 ssc[4];
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u32 sss[4];
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};
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/* Bits in PMU_REGS_STS */
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#define PMU_REGS_STS_BUSY (1 << 8)
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struct pmu_mid {
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struct pmu_regs *regs;
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};
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static int pmu_read_status(struct pmu_regs *regs)
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{
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int retry = 500000;
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u32 val;
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do {
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val = readl(®s->sts);
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if (!(val & PMU_REGS_STS_BUSY))
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return 0;
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udelay(1);
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} while (--retry);
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printf("WARNING: PMU still busy\n");
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return -EBUSY;
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}
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static int pmu_power_lss(struct pmu_regs *regs, unsigned int lss, bool on)
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{
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unsigned int offset = (lss * 2) / 32;
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unsigned int shift = (lss * 2) % 32;
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u32 ssc;
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int ret;
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/* Check PMU status */
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ret = pmu_read_status(regs);
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if (ret)
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return ret;
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/* Read PMU values */
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ssc = readl(®s->sss[offset]);
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/* Modify PMU values */
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if (on)
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ssc &= ~(0x3 << shift); /* D0 */
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else
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ssc |= 0x3 << shift; /* D3hot */
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/* Write modified PMU values */
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writel(ssc, ®s->ssc[offset]);
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/* Update modified PMU values */
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writel(0x00002201, ®s->cmd);
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/* Check PMU status */
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return pmu_read_status(regs);
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}
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int pmu_turn_power(unsigned int lss, bool on)
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{
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struct pmu_mid *pmu;
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struct udevice *dev;
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int ret;
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ret = syscon_get_by_driver_data(X86_SYSCON_PMU, &dev);
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if (ret)
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return ret;
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pmu = dev_get_priv(dev);
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return pmu_power_lss(pmu->regs, lss, on);
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}
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static int pmu_mid_probe(struct udevice *dev)
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{
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struct pmu_mid *pmu = dev_get_priv(dev);
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pmu->regs = syscon_get_first_range(X86_SYSCON_PMU);
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return 0;
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}
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static const struct udevice_id pmu_mid_match[] = {
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{ .compatible = "intel,pmu-mid", .data = X86_SYSCON_PMU },
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{ /* sentinel */ }
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};
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U_BOOT_DRIVER(intel_mid_pmu) = {
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.name = "pmu_mid",
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.id = UCLASS_SYSCON,
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.of_match = pmu_mid_match,
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.probe = pmu_mid_probe,
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.priv_auto_alloc_size = sizeof(struct pmu_mid),
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};
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