mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-16 09:43:39 +09:00
4e33467d44
early_board_init has been skipped to avoid SDRAM corruption in the case that a fully relocatable image has been loaded into SDRAM and is being executed from SDRAM. x86 is being aligned with other architectures (ARM and PPC in particlar) and will be using Cache-As-RAM to run a C environment from Flash (or SRAM if you have some). early_board_init may be needed to assist in the setup of Cache-As-RAM and the early C environment
149 lines
3.4 KiB
ArmAsm
149 lines
3.4 KiB
ArmAsm
/*
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* U-boot - i386 Startup Code
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*
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* Copyright (c) 2002 Omicron Ceti AB, Daniel Engström <denaiel@omicron.se>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <config.h>
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#include <version.h>
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#include <asm/global_data.h>
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#include <asm/processor-flags.h>
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.section .text
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.code32
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.globl _start
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.type _start, @function
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.globl _i386boot_start
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_i386boot_start:
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/*
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* This is the fail safe 32-bit bootstrap entry point. The
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* following code is not executed from a cold-reset (actually, a
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* lot of it is, but from real-mode after cold reset. It is
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* repeated here to put the board into a state as close to cold
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* reset as necessary)
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*/
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cli
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cld
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/* Turn of cache (this might require a 486-class CPU) */
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movl %cr0, %eax
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orl $(X86_CR0_NW | X86_CR0_CD), %eax
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movl %eax, %cr0
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wbinvd
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/* Tell 32-bit code it is being entered from an in-RAM copy */
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movw $GD_FLG_WARM_BOOT, %bx
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_start:
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/* This is the 32-bit cold-reset entry point */
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movl $0x18, %eax /* Load our segement registes, the
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* gdt have already been loaded by start16.S */
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movw %ax, %fs
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movw %ax, %ds
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movw %ax, %gs
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movw %ax, %es
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movw %ax, %ss
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/* Clear the interupt vectors */
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lidt blank_idt_ptr
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/* Early platform init (setup gpio, etc ) */
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jmp early_board_init
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.globl early_board_init_ret
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early_board_init_ret:
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/* Skip memory initialization if not starting from cold-reset */
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movl %ebx, %ecx
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andl $GD_FLG_COLD_BOOT, %ecx
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jz skip_mem_init
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/* size memory */
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jmp mem_init
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.globl mem_init_ret
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mem_init_ret:
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skip_mem_init:
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/* fetch memory size (into %eax) */
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jmp get_mem_size
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.globl get_mem_size_ret
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get_mem_size_ret:
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#if CONFIG_SYS_SDRAM_ECC_ENABLE
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/* Skip ECC initialization if not starting from cold-reset */
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movl %ebx, %ecx
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andl $GD_FLG_COLD_BOOT, %ecx
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jz init_ecc_ret
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jmp init_ecc
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.globl init_ecc_ret
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init_ecc_ret:
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#endif
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/* Check we have enough memory for stack */
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movl $CONFIG_SYS_STACK_SIZE, %ecx
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cmpl %ecx, %eax
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jb die
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mem_ok:
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/* Set stack pointer to upper memory limit*/
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movl %eax, %esp
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/* Test the stack */
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pushl $0
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popl %ecx
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cmpl $0, %ecx
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jne die
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push $0x55aa55aa
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popl %ecx
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cmpl $0x55aa55aa, %ecx
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jne die
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wbinvd
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/* Determine our load offset */
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call 1f
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1: popl %ecx
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subl $1b, %ecx
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/* Set the upper memory limit parameter */
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subl $CONFIG_SYS_STACK_SIZE, %eax
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/* Reserve space for global data */
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subl $(GD_SIZE * 4), %eax
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/* %eax points to the global data structure */
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movl %esp, (GD_RAM_SIZE * 4)(%eax)
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movl %ebx, (GD_FLAGS * 4)(%eax)
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movl %ecx, (GD_LOAD_OFF * 4)(%eax)
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call board_init_f /* Enter, U-boot! */
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/* indicate (lack of) progress */
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movw $0x85, %ax
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die: hlt
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jmp die
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hlt
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blank_idt_ptr:
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.word 0 /* limit */
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.long 0 /* base */
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