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https://github.com/brain-hackers/u-boot-brain
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![horia.geanta@freescale.com](/assets/img/avatar_default.png)
Signed-off-by: Horia Geantă <horia.geanta@freescale.com> Acked-by: Ruchika Gupta<ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
183 lines
4.7 KiB
C
183 lines
4.7 KiB
C
/*
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* Copyright 2014 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <libfdt.h>
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#include <fdt_support.h>
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#if CONFIG_SYS_FSL_SEC_COMPAT == 2 || CONFIG_SYS_FSL_SEC_COMPAT >= 4
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#include <fsl_sec.h>
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#endif
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/*
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* update crypto node properties to a specified revision of the SEC
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* called with sec_rev == 0 if not on an E processor
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*/
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#if CONFIG_SYS_FSL_SEC_COMPAT == 2 /* SEC 2.x/3.x */
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void fdt_fixup_crypto_node(void *blob, int sec_rev)
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{
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static const struct sec_rev_prop {
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u32 sec_rev;
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u32 num_channels;
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u32 channel_fifo_len;
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u32 exec_units_mask;
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u32 descriptor_types_mask;
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} sec_rev_prop_list[] = {
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{ 0x0200, 4, 24, 0x07e, 0x01010ebf }, /* SEC 2.0 */
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{ 0x0201, 4, 24, 0x0fe, 0x012b0ebf }, /* SEC 2.1 */
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{ 0x0202, 1, 24, 0x04c, 0x0122003f }, /* SEC 2.2 */
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{ 0x0204, 4, 24, 0x07e, 0x012b0ebf }, /* SEC 2.4 */
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{ 0x0300, 4, 24, 0x9fe, 0x03ab0ebf }, /* SEC 3.0 */
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{ 0x0301, 4, 24, 0xbfe, 0x03ab0ebf }, /* SEC 3.1 */
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{ 0x0303, 4, 24, 0x97c, 0x03a30abf }, /* SEC 3.3 */
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};
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static char compat_strlist[ARRAY_SIZE(sec_rev_prop_list) *
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sizeof("fsl,secX.Y")];
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int crypto_node, sec_idx, err;
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char *p;
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u32 val;
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/* locate crypto node based on lowest common compatible */
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crypto_node = fdt_node_offset_by_compatible(blob, -1, "fsl,sec2.0");
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if (crypto_node == -FDT_ERR_NOTFOUND)
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return;
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/* delete it if not on an E-processor */
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if (crypto_node > 0 && !sec_rev) {
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fdt_del_node(blob, crypto_node);
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return;
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}
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/* else we got called for possible uprev */
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for (sec_idx = 0; sec_idx < ARRAY_SIZE(sec_rev_prop_list); sec_idx++)
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if (sec_rev_prop_list[sec_idx].sec_rev == sec_rev)
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break;
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if (sec_idx == ARRAY_SIZE(sec_rev_prop_list)) {
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puts("warning: unknown SEC revision number\n");
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return;
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}
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err = fdt_setprop_u32(blob, crypto_node, "fsl,num-channels",
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sec_rev_prop_list[sec_idx].num_channels);
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if (err < 0)
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printf("WARNING: could not set crypto property: %s\n",
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fdt_strerror(err));
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err = fdt_setprop_u32(blob, crypto_node, "fsl,descriptor-types-mask",
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sec_rev_prop_list[sec_idx].descriptor_types_mask);
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if (err < 0)
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printf("WARNING: could not set crypto property: %s\n",
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fdt_strerror(err));
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err = fdt_setprop_u32(blob, crypto_node, "fsl,exec-units-mask",
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sec_rev_prop_list[sec_idx].exec_units_mask);
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if (err < 0)
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printf("WARNING: could not set crypto property: %s\n",
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fdt_strerror(err));
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err = fdt_setprop_u32(blob, crypto_node, "fsl,channel-fifo-len",
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sec_rev_prop_list[sec_idx].channel_fifo_len);
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if (err < 0)
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printf("WARNING: could not set crypto property: %s\n",
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fdt_strerror(err));
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val = 0;
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while (sec_idx >= 0) {
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p = compat_strlist + val;
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val += sprintf(p, "fsl,sec%d.%d",
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(sec_rev_prop_list[sec_idx].sec_rev & 0xff00) >> 8,
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sec_rev_prop_list[sec_idx].sec_rev & 0x00ff) + 1;
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sec_idx--;
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}
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err = fdt_setprop(blob, crypto_node, "compatible", &compat_strlist,
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val);
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if (err < 0)
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printf("WARNING: could not set crypto property: %s\n",
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fdt_strerror(err));
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}
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#elif CONFIG_SYS_FSL_SEC_COMPAT >= 4 /* SEC4 */
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static u8 caam_get_era(void)
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{
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static const struct {
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u16 ip_id;
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u8 maj_rev;
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u8 era;
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} caam_eras[] = {
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{0x0A10, 1, 1},
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{0x0A10, 2, 2},
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{0x0A12, 1, 3},
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{0x0A14, 1, 3},
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{0x0A14, 2, 4},
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{0x0A16, 1, 4},
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{0x0A10, 3, 4},
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{0x0A11, 1, 4},
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{0x0A18, 1, 4},
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{0x0A11, 2, 5},
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{0x0A12, 2, 5},
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{0x0A13, 1, 5},
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{0x0A1C, 1, 5}
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};
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ccsr_sec_t __iomem *sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
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u32 secvid_ms = sec_in32(&sec->secvid_ms);
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u32 ccbvid = sec_in32(&sec->ccbvid);
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u16 ip_id = (secvid_ms & SEC_SECVID_MS_IPID_MASK) >>
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SEC_SECVID_MS_IPID_SHIFT;
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u8 maj_rev = (secvid_ms & SEC_SECVID_MS_MAJ_REV_MASK) >>
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SEC_SECVID_MS_MAJ_REV_SHIFT;
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u8 era = (ccbvid & SEC_CCBVID_ERA_MASK) >> SEC_CCBVID_ERA_SHIFT;
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int i;
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if (era) /* This is '0' prior to CAAM ERA-6 */
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return era;
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for (i = 0; i < ARRAY_SIZE(caam_eras); i++)
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if (caam_eras[i].ip_id == ip_id &&
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caam_eras[i].maj_rev == maj_rev)
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return caam_eras[i].era;
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return 0;
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}
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static void fdt_fixup_crypto_era(void *blob, u32 era)
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{
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int err;
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int crypto_node;
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crypto_node = fdt_path_offset(blob, "crypto");
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if (crypto_node < 0) {
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printf("WARNING: Missing crypto node\n");
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return;
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}
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err = fdt_setprop_u32(blob, crypto_node, "fsl,sec-era", era);
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if (err < 0) {
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printf("ERROR: could not set fsl,sec-era property: %s\n",
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fdt_strerror(err));
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}
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}
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void fdt_fixup_crypto_node(void *blob, int sec_rev)
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{
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u8 era;
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if (!sec_rev) {
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fdt_del_node_and_alias(blob, "crypto");
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return;
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}
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/* Add SEC ERA information in compatible */
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era = caam_get_era();
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if (era) {
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fdt_fixup_crypto_era(blob, era);
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} else {
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printf("WARNING: Unable to get ERA for CAAM rev: %d\n",
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sec_rev);
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}
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}
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#endif
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