mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
ce90654d1c
There are several changes which happen in mainline kernel which should get also to U-Boot. Here is the list of patches from the kernel: - ARM: zynq: Fix leds subnode name for zc702/zybo-z7 - arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1 - arm64: dts: zynqmp: Fix u48 si5382 chip on zcu111 - arm64: dts: zynqmp: Wire up the DisplayPort subsystem - arm64: dts: zynqmp: Add DisplayPort subsystem - arm64: dts: zynqmp: Add DPDMA node - arm64: dts: zynqmp: Enable phy driver for Sata on zcu102/zcu104/zcu106 - arm64: dts: zynqmp: Enable si5341 driver for zcu102/106/111 - arm64: dts: zynqmp: Add DT description for si5328 for zcu102/zcu106 - arm64: dts: zynqmp-zcu100-revC: correct interrupt flags - arm64: dts: xilinx: align GPIO hog names with dtschema - arm64: zynqmp: Add Xilinx AES node - dt: bindings: dma: xilinx: dpdma: DT bindings for Xilinx DPDMA but also some other changes have been done. - Using only one compatible string for adxl345 on zturn - Remove Xilinx internal DP bindings - Remove USB3.0 serdes configurations - Remove SATA serdes configuration for zc1232 - Resort nvmem_firmware - Update nand compatible string - Aling power-domains property for sd0/1 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
429 lines
6.9 KiB
Plaintext
429 lines
6.9 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2011 - 2015 Xilinx
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* Copyright (C) 2012 National Instruments Corp.
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*/
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/dts-v1/;
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#include "zynq-7000.dtsi"
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/ {
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model = "Xilinx ZC702 board";
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compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
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aliases {
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ethernet0 = &gem0;
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i2c0 = &i2c0;
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serial0 = &uart1;
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spi0 = &qspi;
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mmc0 = &sdhci0;
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usb0 = &usb0;
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x40000000>;
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};
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chosen {
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bootargs = "";
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stdout-path = "serial0:115200n8";
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};
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gpio-keys {
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compatible = "gpio-keys";
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autorepeat;
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sw14 {
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label = "sw14";
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gpios = <&gpio0 12 0>;
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linux,code = <108>; /* down */
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wakeup-source;
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autorepeat;
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};
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sw13 {
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label = "sw13";
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gpios = <&gpio0 14 0>;
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linux,code = <103>; /* up */
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wakeup-source;
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autorepeat;
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};
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};
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leds {
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compatible = "gpio-leds";
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led-ds23 {
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label = "ds23";
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gpios = <&gpio0 10 0>;
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linux,default-trigger = "heartbeat";
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};
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};
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usb_phy0: phy0 {
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compatible = "usb-nop-xceiv";
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#phy-cells = <0>;
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};
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};
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&amba {
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ocm: sram@fffc0000 {
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compatible = "mmio-sram";
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reg = <0xfffc0000 0x10000>;
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};
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};
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&can0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_can0_default>;
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};
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&clkc {
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ps-clk-frequency = <33333333>;
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};
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&gem0 {
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status = "okay";
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phy-mode = "rgmii-id";
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phy-handle = <ðernet_phy>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gem0_default>;
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phy-reset-gpio = <&gpio0 11 0>;
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phy-reset-active-low;
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ethernet_phy: ethernet-phy@7 {
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reg = <7>;
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device_type = "ethernet-phy";
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};
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};
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&gpio0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio0_default>;
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};
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&i2c0 {
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status = "okay";
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clock-frequency = <400000>;
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c0_default>;
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pinctrl-1 = <&pinctrl_i2c0_gpio>;
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scl-gpios = <&gpio0 50 0>;
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sda-gpios = <&gpio0 51 0>;
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i2c-mux@74 {
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compatible = "nxp,pca9548";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x74>;
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i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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si570: clock-generator@5d {
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#clock-cells = <0>;
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compatible = "silabs,si570";
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temperature-stability = <50>;
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reg = <0x5d>;
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factory-fout = <156250000>;
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clock-frequency = <148500000>;
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};
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};
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i2c@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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adv7511: hdmi-tx@39 {
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compatible = "adi,adv7511";
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reg = <0x39>;
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adi,input-depth = <8>;
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adi,input-colorspace = "yuv422";
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adi,input-clock = "1x";
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adi,input-style = <3>;
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adi,input-justification = "right";
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};
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};
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i2c@2 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <2>;
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eeprom@54 {
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compatible = "atmel,24c08";
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reg = <0x54>;
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};
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};
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i2c@3 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <3>;
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gpio@21 {
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compatible = "ti,tca6416";
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reg = <0x21>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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i2c@4 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <4>;
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rtc@51 {
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compatible = "nxp,pcf8563";
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reg = <0x51>;
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};
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};
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i2c@7 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <7>;
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hwmon@34 {
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compatible = "ti,ucd9248";
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reg = <0x34>;
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};
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hwmon@35 {
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compatible = "ti,ucd9248";
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reg = <0x35>;
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};
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hwmon@36 {
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compatible = "ti,ucd9248";
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reg = <0x36>;
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};
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};
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};
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};
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&pinctrl0 {
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pinctrl_can0_default: can0-default {
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mux {
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function = "can0";
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groups = "can0_9_grp";
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};
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conf {
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groups = "can0_9_grp";
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slew-rate = <0>;
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io-standard = <1>;
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};
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conf-rx {
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pins = "MIO46";
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bias-high-impedance;
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};
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conf-tx {
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pins = "MIO47";
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bias-disable;
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};
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};
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pinctrl_gem0_default: gem0-default {
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mux {
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function = "ethernet0";
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groups = "ethernet0_0_grp";
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};
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conf {
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groups = "ethernet0_0_grp";
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slew-rate = <0>;
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io-standard = <4>;
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};
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conf-rx {
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pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
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bias-high-impedance;
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low-power-disable;
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};
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conf-tx {
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pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
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bias-disable;
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low-power-enable;
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};
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mux-mdio {
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function = "mdio0";
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groups = "mdio0_0_grp";
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};
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conf-mdio {
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groups = "mdio0_0_grp";
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slew-rate = <0>;
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io-standard = <1>;
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bias-disable;
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};
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};
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pinctrl_gpio0_default: gpio0-default {
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mux {
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function = "gpio0";
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groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
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"gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
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"gpio0_13_grp", "gpio0_14_grp";
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};
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conf {
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groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
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"gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
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"gpio0_13_grp", "gpio0_14_grp";
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slew-rate = <0>;
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io-standard = <1>;
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};
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conf-pull-up {
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pins = "MIO9", "MIO10", "MIO11", "MIO12", "MIO13", "MIO14";
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bias-pull-up;
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};
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conf-pull-none {
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pins = "MIO7", "MIO8";
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bias-disable;
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};
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};
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pinctrl_i2c0_default: i2c0-default {
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mux {
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groups = "i2c0_10_grp";
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function = "i2c0";
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};
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conf {
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groups = "i2c0_10_grp";
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bias-pull-up;
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slew-rate = <0>;
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io-standard = <1>;
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};
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};
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pinctrl_i2c0_gpio: i2c0-gpio {
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mux {
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groups = "gpio0_50_grp", "gpio0_51_grp";
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function = "gpio0";
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};
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conf {
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groups = "gpio0_50_grp", "gpio0_51_grp";
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slew-rate = <0>;
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io-standard = <1>;
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};
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};
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pinctrl_sdhci0_default: sdhci0-default {
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mux {
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groups = "sdio0_2_grp";
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function = "sdio0";
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};
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conf {
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groups = "sdio0_2_grp";
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slew-rate = <0>;
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io-standard = <1>;
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bias-disable;
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};
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mux-cd {
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groups = "gpio0_0_grp";
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function = "sdio0_cd";
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};
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conf-cd {
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groups = "gpio0_0_grp";
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bias-high-impedance;
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bias-pull-up;
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slew-rate = <0>;
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io-standard = <1>;
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};
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mux-wp {
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groups = "gpio0_15_grp";
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function = "sdio0_wp";
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};
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conf-wp {
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groups = "gpio0_15_grp";
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bias-high-impedance;
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bias-pull-up;
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slew-rate = <0>;
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io-standard = <1>;
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};
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};
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pinctrl_uart1_default: uart1-default {
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mux {
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groups = "uart1_10_grp";
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function = "uart1";
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};
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conf {
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groups = "uart1_10_grp";
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slew-rate = <0>;
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io-standard = <1>;
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};
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conf-rx {
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pins = "MIO49";
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bias-high-impedance;
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};
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conf-tx {
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pins = "MIO48";
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bias-disable;
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};
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};
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pinctrl_usb0_default: usb0-default {
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mux {
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groups = "usb0_0_grp";
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function = "usb0";
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};
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conf {
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groups = "usb0_0_grp";
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slew-rate = <0>;
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io-standard = <1>;
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};
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conf-rx {
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pins = "MIO29", "MIO31", "MIO36";
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bias-high-impedance;
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};
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conf-tx {
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pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
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"MIO35", "MIO37", "MIO38", "MIO39";
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bias-disable;
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};
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};
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};
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&qspi {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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&sdhci0 {
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u-boot,dm-pre-reloc;
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sdhci0_default>;
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};
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&uart1 {
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u-boot,dm-pre-reloc;
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1_default>;
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};
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&usb0 {
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status = "okay";
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dr_mode = "host";
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usb-phy = <&usb_phy0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usb0_default>;
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};
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