mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
eefd93e7f8
Quoting Ye Li from NXP:
"We have confirmed with PMIC team, 0x35 is used only on early chips
and not used any more. 0x25 is the final address."
Fix it by merging power_pca9450a_init and power_pca9450b_init into one
function power_pca9450_init.
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
60 lines
1.6 KiB
C
60 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2019 NXP
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*/
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#ifndef PCA9450_H_
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#define PCA9450_H_
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#define PCA9450_REGULATOR_DRIVER "pca9450_regulator"
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enum {
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PCA9450_REG_DEV_ID = 0x00,
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PCA9450_INT1 = 0x01,
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PCA9450_INT1_MSK = 0x02,
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PCA9450_STATUS1 = 0x03,
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PCA9450_STATUS2 = 0x04,
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PCA9450_PWRON_STAT = 0x05,
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PCA9450_SW_RST = 0x06,
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PCA9450_PWR_CTRL = 0x07,
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PCA9450_RESET_CTRL = 0x08,
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PCA9450_CONFIG1 = 0x09,
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PCA9450_CONFIG2 = 0x0A,
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PCA9450_BUCK123_DVS = 0x0C,
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PCA9450_BUCK1OUT_LIMIT = 0x0D,
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PCA9450_BUCK2OUT_LIMIT = 0x0E,
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PCA9450_BUCK3OUT_LIMIT = 0x0F,
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PCA9450_BUCK1CTRL = 0x10,
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PCA9450_BUCK1OUT_DVS0 = 0x11,
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PCA9450_BUCK1OUT_DVS1 = 0x12,
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PCA9450_BUCK2CTRL = 0x13,
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PCA9450_BUCK2OUT_DVS0 = 0x14,
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PCA9450_BUCK2OUT_DVS1 = 0x15,
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PCA9450_BUCK3CTRL = 0x16,
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PCA9450_BUCK3OUT_DVS0 = 0x17,
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PCA9450_BUCK3OUT_DVS1 = 0x18,
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PCA9450_BUCK4CTRL = 0x19,
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PCA9450_BUCK4OUT = 0x1A,
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PCA9450_BUCK5CTRL = 0x1B,
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PCA9450_BUCK5OUT = 0x1C,
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PCA9450_BUCK6CTRL = 0x1D,
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PCA9450_BUCK6OUT = 0x1E,
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PCA9450_LDO_AD_CTRL = 0x20,
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PCA9450_LDO1CTRL = 0x21,
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PCA9450_LDO2CTRL = 0x22,
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PCA9450_LDO3CTRL = 0x23,
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PCA9450_LDO4CTRL = 0x24,
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PCA9450_LDO5CTRL_L = 0x25,
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PCA9450_LDO5CTRL_H = 0x26,
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PCA9450_LOADSW_CTRL = 0x2A,
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PCA9450_VRFLT1_STS = 0x2B,
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PCA9450_VRFLT2_STS = 0x2C,
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PCA9450_VRFLT1_MASK = 0x2D,
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PCA9450_VRFLT2_MASK = 0x2E,
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PCA9450_REG_NUM,
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};
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int power_pca9450_init(unsigned char bus);
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#endif
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