mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-06 19:26:16 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
109 lines
2.7 KiB
C
109 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
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*/
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#include <common.h>
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#include <asm/fsp/fsp_support.h>
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#include <asm/e820.h>
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#include <asm/mrccache.h>
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#include <asm/post.h>
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DECLARE_GLOBAL_DATA_PTR;
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int dram_init(void)
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{
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phys_size_t ram_size = 0;
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const struct hob_header *hdr;
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struct hob_res_desc *res_desc;
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hdr = gd->arch.hob_list;
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while (!end_of_hob(hdr)) {
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if (hdr->type == HOB_TYPE_RES_DESC) {
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res_desc = (struct hob_res_desc *)hdr;
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if (res_desc->type == RES_SYS_MEM ||
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res_desc->type == RES_MEM_RESERVED) {
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ram_size += res_desc->len;
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}
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}
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hdr = get_next_hob(hdr);
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}
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gd->ram_size = ram_size;
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post_code(POST_DRAM);
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#ifdef CONFIG_ENABLE_MRC_CACHE
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gd->arch.mrc_output = fsp_get_nvs_data(gd->arch.hob_list,
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&gd->arch.mrc_output_len);
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#endif
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return 0;
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}
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int dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = 0;
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gd->bd->bi_dram[0].size = gd->ram_size;
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return 0;
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}
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/*
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* This function looks for the highest region of memory lower than 4GB which
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* has enough space for U-Boot where U-Boot is aligned on a page boundary.
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* It overrides the default implementation found elsewhere which simply
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* picks the end of ram, wherever that may be. The location of the stack,
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* the relocation address, and how far U-Boot is moved by relocation are
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* set in the global data structure.
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*/
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ulong board_get_usable_ram_top(ulong total_size)
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{
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return fsp_get_usable_lowmem_top(gd->arch.hob_list);
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}
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unsigned int install_e820_map(unsigned int max_entries,
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struct e820_entry *entries)
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{
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unsigned int num_entries = 0;
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const struct hob_header *hdr;
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struct hob_res_desc *res_desc;
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hdr = gd->arch.hob_list;
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while (!end_of_hob(hdr)) {
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if (hdr->type == HOB_TYPE_RES_DESC) {
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res_desc = (struct hob_res_desc *)hdr;
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entries[num_entries].addr = res_desc->phys_start;
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entries[num_entries].size = res_desc->len;
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if (res_desc->type == RES_SYS_MEM)
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entries[num_entries].type = E820_RAM;
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else if (res_desc->type == RES_MEM_RESERVED)
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entries[num_entries].type = E820_RESERVED;
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num_entries++;
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}
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hdr = get_next_hob(hdr);
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}
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/* Mark PCIe ECAM address range as reserved */
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entries[num_entries].addr = CONFIG_PCIE_ECAM_BASE;
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entries[num_entries].size = CONFIG_PCIE_ECAM_SIZE;
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entries[num_entries].type = E820_RESERVED;
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num_entries++;
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#ifdef CONFIG_HAVE_ACPI_RESUME
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/*
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* Everything between U-Boot's stack and ram top needs to be
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* reserved in order for ACPI S3 resume to work.
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*/
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entries[num_entries].addr = gd->start_addr_sp - CONFIG_STACK_SIZE;
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entries[num_entries].size = gd->ram_top - gd->start_addr_sp + \
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CONFIG_STACK_SIZE;
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entries[num_entries].type = E820_RESERVED;
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num_entries++;
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#endif
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return num_entries;
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}
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