mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-11 21:56:21 +09:00
834e91af43
Add the support for the dra7xx xhci usb host. dra7xx does not contain an EHCI controller so the headers can be removed from the board file. The xHCI host on dra7xx is connected to a usb2 phy so need to add support to enable those clocks. Signed-off-by: Dan Murphy <dmurphy@ti.com>
82 lines
2.2 KiB
C
82 lines
2.2 KiB
C
/*
|
|
* (C) Copyright 2013
|
|
* Texas Instruments Incorporated.
|
|
* Lokesh Vutla <lokeshvutla@ti.com>
|
|
*
|
|
* Configuration settings for the TI DRA7XX board.
|
|
* See omap5_common.h for omap5 common settings.
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#ifndef __CONFIG_DRA7XX_EVM_H
|
|
#define __CONFIG_DRA7XX_EVM_H
|
|
|
|
#define CONFIG_DRA7XX
|
|
|
|
/* MMC ENV related defines */
|
|
#define CONFIG_ENV_IS_IN_MMC
|
|
#define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */
|
|
#define CONFIG_ENV_OFFSET 0xE0000
|
|
#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
|
|
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
|
|
#define CONFIG_CMD_SAVEENV
|
|
|
|
#define CONSOLEDEV "ttyO0"
|
|
#define CONFIG_CONS_INDEX 1
|
|
#define CONFIG_SYS_NS16550_COM1 UART1_BASE
|
|
#define CONFIG_BAUDRATE 115200
|
|
|
|
#define CONFIG_SYS_OMAP_ABE_SYSCK
|
|
|
|
#include <configs/omap5_common.h>
|
|
|
|
/* CPSW Ethernet */
|
|
#define CONFIG_CMD_NET /* 'bootp' and 'tftp' */
|
|
#define CONFIG_CMD_DHCP
|
|
#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */
|
|
#define CONFIG_BOOTP_DNS2
|
|
#define CONFIG_BOOTP_SEND_HOSTNAME
|
|
#define CONFIG_BOOTP_GATEWAY
|
|
#define CONFIG_BOOTP_SUBNETMASK
|
|
#define CONFIG_NET_RETRY_COUNT 10
|
|
#define CONFIG_CMD_PING
|
|
#define CONFIG_CMD_MII
|
|
#define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */
|
|
#define CONFIG_MII /* Required in net/eth.c */
|
|
#define CONFIG_PHY_GIGE /* per-board part of CPSW */
|
|
#define CONFIG_PHYLIB
|
|
#define CONFIG_PHY_ADDR 2
|
|
|
|
/* SPI */
|
|
#undef CONFIG_OMAP3_SPI
|
|
#define CONFIG_TI_QSPI
|
|
#define CONFIG_SPI_FLASH
|
|
#define CONFIG_SPI_FLASH_SPANSION
|
|
#define CONFIG_CMD_SF
|
|
#define CONFIG_CMD_SPI
|
|
#define CONFIG_TI_SPI_MMAP
|
|
#define CONFIG_SF_DEFAULT_SPEED 48000000
|
|
#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3
|
|
|
|
/* SPI SPL */
|
|
#define CONFIG_SPL_SPI_SUPPORT
|
|
#define CONFIG_SPL_SPI_LOAD
|
|
#define CONFIG_SPL_SPI_FLASH_SUPPORT
|
|
#define CONFIG_SPL_SPI_BUS 0
|
|
#define CONFIG_SPL_SPI_CS 0
|
|
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
|
|
|
|
/* USB xHCI HOST */
|
|
#define CONFIG_CMD_USB
|
|
#define CONFIG_USB_HOST
|
|
#define CONFIG_USB_XHCI
|
|
#define CONFIG_USB_XHCI_OMAP
|
|
#define CONFIG_USB_STORAGE
|
|
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
|
|
|
|
#define CONFIG_OMAP_USB_PHY
|
|
#define CONFIG_OMAP_USB2PHY2_HOST
|
|
|
|
#endif /* __CONFIG_DRA7XX_EVM_H */
|