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https://github.com/brain-hackers/u-boot-brain
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cd71b1d5d2
Add initial support for the Ingenic JZ47xx MIPS SoC. Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Reviewed-by: Marek Vasut <marex@denx.de>
40 lines
1.0 KiB
C
40 lines
1.0 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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#include <config.h>
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#include <common.h>
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#include <asm/io.h>
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#include <mach/jz4780.h>
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int jz47xx_gpio_get_value(unsigned int gpio)
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{
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void __iomem *gpio_regs = (void __iomem *)GPIO_BASE;
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int port = gpio / 32;
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int pin = gpio % 32;
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return readl(gpio_regs + GPIO_PXPIN(port)) & BIT(pin);
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}
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void jz47xx_gpio_direction_input(unsigned int gpio)
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{
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void __iomem *gpio_regs = (void __iomem *)GPIO_BASE;
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int port = gpio / 32;
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int pin = gpio % 32;
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writel(BIT(pin), gpio_regs + GPIO_PXINTC(port));
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writel(BIT(pin), gpio_regs + GPIO_PXMASKS(port));
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writel(BIT(pin), gpio_regs + GPIO_PXPAT1S(port));
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}
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void jz47xx_gpio_direction_output(unsigned int gpio, int value)
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{
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void __iomem *gpio_regs = (void __iomem *)GPIO_BASE;
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int port = gpio / 32;
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int pin = gpio % 32;
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writel(BIT(pin), gpio_regs + GPIO_PXINTC(port));
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writel(BIT(pin), gpio_regs + GPIO_PXMASKS(port));
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writel(BIT(pin), gpio_regs + GPIO_PXPAT1C(port));
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writel(BIT(pin), gpio_regs +
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(value ? GPIO_PXPAT0S(port) : GPIO_PXPAT0C(port)));
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}
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