u-boot-brain/drivers/clk
Simon Glass b2b1100a3b aspeed: ast2500: Read clock ofdata in the correct method
At present the clock driver reads its ofdata in the probe() method. This
is not correct although it is often harmless.

However in this case it causes a problem, something like this:

- ast_get_scu() is called (from somewhere) to get the SCI address
- this probes the clock
   - first sets up ofdata (which does nothing at present)
   - DM marks clock device as active
   - DM calls pinctrl
      - pinctrl probes and calls ast_get_scu() in ast2500_pinctrl_probe()
      - ast_get_scu() probes the clock, but sees it already marked as
           probed
      - ast_get_scu() accesses the clock's private data, with scu as NULL
   - DM calls clock probe function ast2500_clk_probe() which reads scu

By putting the read of scu into the correct method, scu is read as part of
ofdata setup, and everything is OK.

Note: This problem did not matter until now since DM always probed all
parents before reading a child's ofdata. The fact that pinctrl is a child
of clock seems to trigger this strange bug.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
2020-01-07 16:02:38 -07:00
..
altera clk: socfpga: replace dm_fdt_pre_reloc by dm_ofnode_pre_reloc 2019-04-11 20:10:05 -06:00
analogbits clk: sifive: Sync-up WRPLL library with upstream Linux 2019-07-19 14:24:51 +08:00
aspeed aspeed: ast2500: Read clock ofdata in the correct method 2020-01-07 16:02:38 -07:00
at91 ARM: at91: Rename sama5_sfr.h to at91_sfr.h 2019-10-08 09:16:11 +03:00
exynos clk: Remove DM_FLAG_PRE_RELOC flag in various drivers 2018-11-14 09:16:28 -08:00
imx clk: imx: imx8mm: Fix the first root clock in imx8mm_ahb_sels[] 2019-12-06 13:57:42 +01:00
mediatek clk: mediatek: add driver for MT8518 2019-12-03 08:44:14 -05:00
meson clk: meson-sm1: add compatible 2019-10-18 14:26:59 +02:00
mtmips clk: add clock driver for MediaTek MT76x8 platform 2019-10-25 17:20:44 +02:00
mvebu clk: armada-37xx-periph: Support changing clock parent and rate 2018-09-19 08:59:26 +02:00
owl clk: Remove DM_FLAG_PRE_RELOC flag in various drivers 2018-11-14 09:16:28 -08:00
renesas clk: renesas: Add R8A77980 V3H clock tables 2019-08-09 23:15:01 +02:00
rockchip rockchip: clk: Add clk driver for rk3308 2019-11-17 17:22:53 +08:00
sifive clk: sifive: Drop GEMGXL clock driver 2019-07-19 14:24:51 +08:00
sunxi sunxi: clocks: Add H6 USB clock gates and resets 2019-07-16 17:13:15 +05:30
tegra drivers: cosmetic: Convert SPDX license tags to Linux Kernel style 2018-10-28 09:26:39 -04:00
uniphier clk: uniphier: add EMMC clock for LD11, LD20, and PXs3 2019-07-10 22:41:55 +09:00
clk_bcm6345.c clk: bcm6345: convert to use live dt 2018-06-01 15:56:02 +02:00
clk_boston.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
clk_fixed_factor.c clk: Remove clock ID check in .get_rate() of clk_fixed_* 2019-07-19 14:50:30 +02:00
clk_fixed_rate.c clk: introduce enable_count 2019-08-22 00:10:09 +02:00
clk_pic32.c clk: Remove DM_FLAG_PRE_RELOC flag in various drivers 2018-11-14 09:16:28 -08:00
clk_sandbox_ccf.c sandbox: clk: add clk enable/disable test code 2019-08-22 00:10:09 +02:00
clk_sandbox_test.c test: clk: Update tests to also check the managed API 2019-10-22 16:14:05 +02:00
clk_sandbox.c test: clk: test clock self assignment 2019-10-22 16:14:05 +02:00
clk_stm32f.c clk: clk_stm32f: Use PLLSAIP as USB 48MHz clock 2018-05-08 09:07:34 -04:00
clk_stm32h7.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
clk_stm32mp1.c common: Move get_ticks() function out of common.h 2019-12-02 18:23:13 -05:00
clk_versal.c arm64: versal: Rename versal_pm_request to xilinx_pm_request 2019-10-24 13:37:01 +02:00
clk_vexpress_osc.c misc: Update read() and write() methods to return bytes xfered 2018-11-20 19:14:22 -07:00
clk_zynq.c ARM: zynq: Add missing i2c get_rate for fixing i2c SPL 2019-04-16 11:51:34 +02:00
clk_zynqmp.c arm64: zynqmp: Switch to xlnx-zynqmp-clk header 2019-10-24 13:37:02 +02:00
clk-cdce9xx.c clk: cdce9xx: add support for cdce9xx clock synthesizer 2019-10-11 13:32:39 -04:00
clk-composite.c clk: add composite clk support 2019-07-31 09:20:51 +02:00
clk-divider.c clk: divider set rate supporrt 2019-07-31 09:20:51 +02:00
clk-fixed-factor.c clk: Port Linux common clock framework [CCF] for imx6q to U-boot (tag: v5.1.12) 2019-07-19 14:50:30 +02:00
clk-gate.c clk: gate: support sandbox 2019-07-31 09:20:51 +02:00
clk-hsdk-cgu.c Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR 2018-04-27 14:54:48 -04:00
clk-mux.c clk: mux: add set parent support 2019-07-31 09:20:51 +02:00
clk-ti-sci.c clk: clk-ti-sci: Notify AVS driver upon setting clock rate 2019-11-07 18:39:16 -05:00
clk-uclass.c drivers: clk: Fix using assigned-clocks in the node of the clock it sets up 2019-10-22 16:14:05 +02:00
clk.c clk: introduce enable_count 2019-08-22 00:10:09 +02:00
ics8n3qv01.c clk: Add ICS8N3QV01 driver 2018-05-08 18:50:23 -04:00
Kconfig clk: cdce9xx: add support for cdce9xx clock synthesizer 2019-10-11 13:32:39 -04:00
Makefile clk: add clock driver for MediaTek MT76x8 platform 2019-10-25 17:20:44 +02:00
mpc83xx_clk.c Move strtomhz() to vsprintf.h 2019-12-02 18:23:09 -05:00
mpc83xx_clk.h clk: Add MPC83xx clock driver 2018-09-18 00:01:18 -06:00