mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-09 12:46:17 +09:00
a0aba8a2eb
CONFIG_SYS_[DI]CACHE_OFF had been partially converted to Kconfig
parameters; only for the ARC architecture. This patch turns these two
parameters into Kconfig items everywhere else they are found.
All of the include/configs/* and defconfig changes in this patch are
for arm machines only. The Kconfig changes for arc, nds32, riscv,
and xtensa have been included since these symbols are found in code
under arch/{arc,nds32,riscv,xtensa}, however, no currently-defined
include/configs/* or defconfigs for these architectures exist which
include these symbols.
These results have been confirmed with tools/moveconfig.py.
Acked-by: Alexey Brodkin <abrodkin@snopsys.com>
Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
[trini: Re-migrate for a few more boards]
Signed-off-by: Tom Rini <trini@konsulko.com>
98 lines
2.8 KiB
C
98 lines
2.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Configuation settings for the bonito board
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*
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* Copyright (C) 2012 Renesas Solutions Corp.
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*/
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#ifndef __ARMADILLO_800EVA_H
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#define __ARMADILLO_800EVA_H
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#define CONFIG_SH_GPIO_PFC
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#include <asm/arch/rmobile.h>
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#define BOARD_LATE_INIT
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#undef CONFIG_SHOW_BOOT_PROGRESS
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#define CONFIG_ARCH_CPU_INIT
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#define CONFIG_TMU_TIMER
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#define CONFIG_SYS_TIMER_COUNTS_DOWN
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#define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */
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#define CONFIG_SYS_TIMER_RATE (CONFIG_SYS_CLK_FREQ / 4)
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/* STACK */
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#define CONFIG_SYS_INIT_SP_ADDR 0xE8083000
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#define STACK_AREA_SIZE 0xC000
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#define LOW_LEVEL_MERAM_STACK \
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(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
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/* MEMORY */
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#define ARMADILLO_800EVA_SDRAM_BASE 0x40000000
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#define ARMADILLO_800EVA_SDRAM_SIZE (512 * 1024 * 1024)
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#define CONFIG_SYS_PBSIZE 256
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#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
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/* SCIF */
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#define CONFIG_CONS_SCIF1
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#define SCIF0_BASE 0xe6c40000
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#define SCIF1_BASE 0xe6c50000
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#define SCIF2_BASE 0xe6c60000
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#define SCIF4_BASE 0xe6c80000
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#define CONFIG_SCIF_A
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#define CONFIG_SYS_MEMTEST_START (ARMADILLO_800EVA_SDRAM_BASE)
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
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504 * 1024 * 1024)
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#undef CONFIG_SYS_MEMTEST_SCRATCH
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#undef CONFIG_SYS_LOADS_BAUD_CHANGE
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#define CONFIG_SYS_SDRAM_BASE (ARMADILLO_800EVA_SDRAM_BASE)
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#define CONFIG_SYS_SDRAM_SIZE (ARMADILLO_800EVA_SDRAM_SIZE)
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#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \
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64 * 1024 * 1024)
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#define CONFIG_SYS_MONITOR_BASE 0x00000000
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#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
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#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
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#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
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/* FLASH */
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#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
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#define CONFIG_SYS_FLASH_BASE 0x00000000
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#define CONFIG_SYS_MAX_FLASH_SECT 512
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) }
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#define CONFIG_SYS_FLASH_ERASE_TOUT 3000
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#define CONFIG_SYS_FLASH_WRITE_TOUT 3000
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#define CONFIG_SYS_FLASH_LOCK_TOUT 3000
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#define CONFIG_SYS_FLASH_UNLOCK_TOUT 3000
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/* ENV setting */
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#define CONFIG_ENV_OVERWRITE 1
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#define CONFIG_ENV_SECT_SIZE (128 * 1024)
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#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \
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CONFIG_SYS_MONITOR_LEN)
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#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
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#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
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#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
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/* SH Ether */
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#define CONFIG_SH_ETHER_USE_PORT 0
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#define CONFIG_SH_ETHER_PHY_ADDR 0x0
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#define CONFIG_SH_ETHER_BASE_ADDR 0xe9a00000
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#define CONFIG_SH_ETHER_SH7734_MII (0x01)
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#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
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#define CONFIG_PHY_SMSC
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#define CONFIG_BITBANGMII
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#define CONFIG_BITBANGMII_MULTI
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/* Board Clock */
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#define CONFIG_SYS_CLK_FREQ 50000000
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#endif /* __ARMADILLO_800EVA_H */
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